Multi-hit Caching with Bloom Filter for Long-tail Content

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Solution Overview

Problem

Content delivery networks (CDNs) face inefficiencies in caching performance due to the impact of 'long-tail' content, which leads to suboptimal resource utilization, increased costs, and performance degradation, as existing caching techniques like first hit caching and multi-hit caching introduce unnecessary write operations and memory overhead.

Innovation Solution

An optimized multi-hit caching technique that caches content only after a specified number of requests within a defined interval, using hashing and bit arrays to track content requests efficiently, thereby reducing the performance impact of long-tail content without increasing costs or memory overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If first hit caching is used to cache all content on first request, then caching coverage is maximized, but resource utilization deteriorates due to long-tail content occupying cache space

Engineering Contradiction:
Improvecaching coverageVSAvoidresource utilization
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent segments content into two categories: long-tail content (cached on Nth hit, N>1) and non-long-tail content (cached on first hit). This segmentation allows differential caching strategies that optimize resource utilization while maintaining adequate caching coverage for different content types.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the caching parameter (number of hits required) based on content characteristics. For long-tail content, it requires N hits (N>1) before caching, while for other content, caching occurs on first hit. This parameter change resolves the contradiction by adjusting caching behavior to match content demand patterns.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If multi-hit caching is used to avoid caching long-tail content, then resource utilization improves, but memory overhead increases due to tracking request counts

Engineering Contradiction:
Improveresource utilizationVSAvoidmemory overhead
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent uses a bitmap as a simplified copy/representation of the request count data structure. Instead of storing full counters for all content, it uses a compact bitmap where each bit represents whether content has been requested N times, dramatically reducing memory overhead while maintaining multi-hit caching functionality.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent employs a lightweight bitmap data structure that uses minimal memory resources compared to traditional counting mechanisms. The bitmap is periodically flushed and recreated, allowing the system to use a simple, cheap data structure instead of maintaining complex persistent state, thereby reducing memory overhead.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Measurement precision

If traditional multi-hit caching tracks request counts for all content, then caching accuracy improves, but write operations increase due to frequent cache updates

Engineering Contradiction:
Improvecaching accuracyVSAvoidwrite operations
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The patent extracts the essential information needed for multi-hit caching (whether content has reached N requests) from the full request count data, storing only this extracted information in the bitmap. This extraction maintains sufficient caching accuracy while eliminating the need to track and update complete request counts, thereby reducing write operations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent periodically flushes the bitmap data structure, discarding accumulated request tracking information and recovering cache space. This periodic discarding prevents continuous write operations while maintaining caching accuracy within each interval, as the system only needs to track requests within the current flushing interval.

Inventive Principle:
Principle #34Discarding and recovering

4Speed

If caching servers store more content locally, then delivery speed improves, but cost increases due to additional storage infrastructure

Engineering Contradiction:
Improvedelivery speedVSAvoidstorage capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent implements dynamic caching behavior where the caching decision (first hit vs. Nth hit) adapts based on content characteristics and request patterns. This dynamic approach optimizes the use of existing storage capacity, ensuring that limited storage resources are allocated to content that provides the most value, thereby improving delivery speed without requiring additional storage infrastructure.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8639780B2Optimizing multi-hit caching for long tail content
Publication Date: 2014.01.28 DRNC HOLDINGS INC
  • US8639780B2 patent drawing
  • US8639780B2 patent drawing
  • US8639780B2 patent drawing

AI summary

Some embodiments provide an optimized multi-hit caching technique that minimizes the performance impact associated with caching of long-tail content while retaining much of the efficiency and minimal overhead associated with first hit caching in determining when to cache content. The optimized multi-hit caching utilizes a modified bloom filter implementation that performs flushing and state rolling to delete indices representing stale content from a bit array used to track hit counts without affecting identification of other content that may be represented with indices overlapping with those representing the stale content. Specifically, a copy of the bit array is stored prior to flushing the bit array so as to avoid losing track of previously requested and cached content when flushing the bit arras and the flushing is performed to remove the bit indices representing stale content from the bit array and to minimize the possibility of a false positive.