Multi-Host LPC Controller for Peripheral Sharing
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Solution Overview
Problem
Conventional computing systems require a large number of pins for ISA and X-bus interfaces, leading to inefficiencies in manufacturing, reliability, and cost, and increased size, which can be mitigated by implementing a low pin count (LPC) bus to support peripheral devices efficiently.
Innovation Solution
A multi-host LPC controller is introduced, featuring a microcontroller and LPC-IN unit to manage access requests and facilitate sharing of peripheral devices among multiple hosts via an on-chip or LPC-In bus, operating in software and auto modes to moderate access cycles such as target, DMA, and bus master accesses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a large number of pins are used to support ISA bus and X-bus interfaces, then the processing unit can interface with peripheral devices, but the manufacturing efficiency and reliability are reduced, and the size and cost of the computing system increase
Solution Approach 1:
The patent merges multiple platform components (embedded controller, super I/O chip, firmware hub, keyboard controller, mouse controller) into a single integrated LPC controller that interfaces with all peripheral devices through the LPC bus, eliminating the need for separate controllers and reducing the overall pin count required for interfacing
Solution Approach 2:
The LPC controller is designed as a universal interface that supports multiple types of peripheral devices (I/O devices, storage devices, keyboard, mouse) through a single standardized LPC bus interface, allowing one controller to perform functions that previously required multiple dedicated controllers
2Adaptability or versatility
If multiple platform components are interfaced with the LPC bus, then peripheral devices can be accessed, but access conflicts and arbitration complexity increase
Solution Approach 1:
The LPC controller acts as an intermediary between multiple platform components and peripheral devices, managing access rights and coordinating communications through defined arbitration protocols, thereby simplifying the access management complexity
Solution Approach 2:
The LPC controller implements feedback mechanisms through interrupt signals and status registers that inform the processing unit about the state of peripheral devices and access conflicts, enabling automatic resolution of access conflicts without manual intervention
3Device complexity
If a single processing unit accesses platform components through the LPC bus, then the system remains simple, but the system cannot support multiple hosts or seamless access by multiple processing units
Solution Approach 1:
The LPC controller is designed with dynamic capabilities to adapt its operation mode based on the presence of multiple hosts, enabling it to switch between single-host and multi-host modes and dynamically manage access rights accordingly
Solution Approach 2:
The LPC controller is enhanced with multi-functional capabilities to support both single processing unit access and multiple host access scenarios, making the system adaptable to different configuration requirements without requiring separate controllers for each mode
Data Source
AI summary
Described herein is a system having a multi-host low pin count (LPC) controller (100) configured to facilitate sharing of common peripheral devices by multiple hosts (115) of a multi-host computing system (110). In one implementation, the multi-host LPC controller (100) interfaces with the hosts (115) via an ON-chip bus or an LPC-IN-chip bus. Further, the multi-host LPC controller (100) includes a LPC-IN controller (160) and a microcontroller (155) to moderate among requests generated by the hosts (115). The requests can be target accesses, DMA accesses, and BM accesses. Also, the multi-host LPC controller (100) is configured to operate in a software mode and an auto mode. Based on the mode the multi-host LPC controller (100) is operating in, the requests generated by the various hosts are moderated.