Multi-Host NIC Direct Die Routing for NUMA Data Transfer
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Solution Overview
Problem
In modern multi-die CPU systems, memory access and I/O operations become asymmetric, leading to slower communication between different dies due to the need to traverse an inter-die switch fabric, which affects the efficiency of data transfer between network I/O and local resources.
Innovation Solution
A multi-host network controller (NIC) is implemented, allowing direct connections to each die within the CPU, reducing the need for data to traverse the inter-die fabric by routing packets directly to the appropriate die for memory or storage access, and eliminating the need to write and read data from RAM when transferring between dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is transferred between different dies through the inter-die fabric, then communication between memory or I/O connected to different dies is enabled, but the transfer speed decreases due to the need to traverse multiple dies and the inter-die switch fabric
Solution Approach 1:
The system segments the data transfer path by introducing an inter-die cache memory on each die that can independently handle data transfers. This allows data to be cached locally on the destination die before being transferred through the inter-die fabric, reducing the need for repeated traversals and improving overall transfer speed while maintaining communication capability between different dies.
2Productivity
If data is written to and read from RAM when transferring between dies, then data can be stored and retrieved, but the process time increases due to additional write and read operations
Solution Approach 1:
The inter-die cache memory performs preliminary action by pre-fetching and caching data on the destination die before the actual transfer through the inter-die fabric is complete. This allows the receiving die to have data ready in its local cache, eliminating the need for additional read operations from main RAM and reducing the overall transfer process time.
3Device complexity
If a single NIC is connected to one die, then the CPU structure is simplified, but data transfer efficiency decreases when network I/O needs to access resources on different dies
Solution Approach 1:
The system implements multi-functionality by enabling each die to have direct access to the shared inter-die cache memory and fabric infrastructure. This allows any die to serve as both a source and destination for data transfers, and the inter-die cache memory can serve multiple dies simultaneously, improving data transfer efficiency without requiring each die to have dedicated NIC connections while maintaining simplified CPU structure.
Data Source
AI summary
A system includes a central processing unit (CPU) including semiconductor dies, wherein each semiconductor die includes processing cores. The system includes a multi-host network interface card (NIC). The NIC includes an external connection interface circuit and CPU interface circuits. The NIC is coupled to an external data source through the external connection interface circuit and to each the semiconductor dies through a respective CPU interface circuit. The NIC is configured to receive data from the external data source for a different peripherals separately connected to semiconductor dies, and route the data for peripherals through respective CPU interface circuits.