Multi-Input Differential Pair for Linear Coarse-Fine ADC Ramping

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Solution Overview

Problem

Existing analog-to-digital conversion methods in image sensors suffer from non-linear output characteristics due to voltage slope differences during coarse and fine ramping processes, leading to code shifts during A/D conversion.

Innovation Solution

Incorporating a multi-input differential pair and a comparator with a coarse and fine input differential stage, along with a signal processing unit and a coarse ramping voltage blocking unit, to directly apply and compensate ramping voltages, ensuring accurate reflection of voltages without capacitive dividing effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the fine ramping voltage is coupled in series to parasitic capacitance of the input stage through the capacitor, then the capacitor can store and transmit the voltage, but the voltage transmission suffers loss and non-linear output characteristic occurs

Engineering Contradiction:
Improvevoltage transmission accuracyVSAvoidvoltage loss
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The patent extracts the fine ramping voltage transmission path from the capacitive coupling path. By using a separate transmission path that bypasses the capacitor and parasitic capacitance, the fine ramping voltage is transmitted directly to the comparator input stage without suffering voltage loss or non-linear distortion caused by capacitive dividing effects.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary transmission path that mediates between the fine ramping voltage source and the comparator input stage. This intermediary path eliminates the harmful interaction with parasitic capacitance while preserving the voltage transmission function, thereby maintaining measurement precision without voltage loss.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the slopes of coarse ramping voltage and fine ramping voltage differ during conversion process, then the multi-step conversion can be performed, but code shift occurs and linearity is degraded

Engineering Contradiction:
Improveconversion speedVSAvoidoutput linearity
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent employs feedback mechanisms to monitor and adjust the ramping voltage slopes. By continuously comparing the actual slopes with reference slopes and applying corrective feedback, the system maintains consistent slope characteristics across both coarse and fine conversion steps, preventing code shift and preserving output linearity while maintaining high conversion speed.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically adjusts critical parameters such as ramping voltage slopes and timing characteristics during the conversion process. By changing these parameters in real-time based on conversion stage and conditions, the system optimizes both conversion speed and output linearity, eliminating code shift while maintaining high productivity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8922413B1Amplifier using multi input differential pair, and comparator and analog-to-digital converting apparatus using the same
Publication Date: 2014.12.30 SK HYNIX INC
  • US8922413B1 patent drawing
  • US8922413B1 patent drawing
  • US8922413B1 patent drawing

AI summary

An amplifier includes a common load suitable for outputting an output signal, a coarse input differential stage, coupled to the common load, suitable for amplifying a difference between an input signal and a coarse ramping signal to output a coarse conversion signal as a first output signal, when the coarse ramping signal is lower than the input signal, and a fine input differential stage, coupled to the common load, suitable for amplifying a difference between a fine ramping signal and a bias signal and compensating the first output signal to output a fine conversion signal as the output signal, when a zero crossing occurs by the compensated first output signal.