Multi-Input Pipeline Data Bus for VSoC

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Solution Overview

Problem

Conventional synchronous buses and event-based readout paths are inadequate for transferring both continuous data, such as complete images, and sparse data, like feature coordinates, from Vision Systems on Chip (VSoC), as they cannot handle varying data word lengths and sparse data streams effectively.

Innovation Solution

A high-speed asynchronous multi-input pipeline data bus with M stages of buffer elements and N pipeline stage elements, where each pipeline stage element reads out buffered data sequentially to generate a continuous data stream, supporting both continuous and sparse data transfer with low latency and arbitrary data word widths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional synchronous buses are used for data transfer, then data can be read out sequentially from SIMD units, but the system cannot effectively handle sparse data streams with varying word lengths and arbitrary data widths

Engineering Contradiction:

Improveability to handle both continuous and sparse dataVSAvoiddata transfer speed

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent implements a dynamic readout system where pipeline stage elements can adaptively switch between different operational modes (continuous data mode and sparse data mode) based on the data source characteristics. The system dynamically adjusts its behavior to handle varying data widths and formats without requiring additional control information, thereby achieving both high speed and versatility.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The data bus architecture is designed with universal pipeline stage elements that can process multiple types of data (continuous images and sparse feature coordinates) through the same hardware path. The pipeline elements are configured to universally handle arbitrary data widths and formats, eliminating the need for separate dedicated paths for different data types.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If event-based readout paths are used for sparse data, then feature coordinates can be read out, but the system cannot handle continuous data streams like complete images

Engineering Contradiction:

Improveability to handle sparse dataVSAvoiddata transfer speed

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The readout path implements dynamic operational modes that can switch between sparse data handling (event-based) and continuous data handling (stream-based). The pipeline stage elements adapt their behavior based on the data source, enabling the same hardware to achieve high-speed transfer for both sparse feature coordinates and continuous image data without sacrificing performance in either mode.

Inventive Principle:

Principle #15Dynamics

3Productivity

If sequential data readout is used from SIMD units, then all columns or consecutive areas can be read out, but the system cannot react to and propagate events in real-time

Engineering Contradiction:

Improvedata readout completenessVSAvoidevent propagation delay

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent implements a continuous data stream generation mechanism where the pipeline stage elements continuously read out and forward data without interruption. The system maintains continuous operation by buffering data in pipeline stages and continuously propagating it forward, eliminating idle time and ensuring real-time event propagation while maintaining complete data coverage.

Inventive Principle:

Principle #20Continuity of useful action

Solution Approach 2:

The pipeline architecture performs preliminary buffering and preparation of data in intermediate stages before final output. Data is pre-positioned in pipeline buffers and ready for immediate forward propagation, reducing latency and enabling real-time event response while ensuring complete data readout from all SIMD columns.

Inventive Principle:

Principle #10Preliminary action

4Manufacturing precision

If additional control information is added to handle variable data widths, then data can be accurately transferred, but the device complexity increases

Engineering Contradiction:

Improvedata width accuracyVSAvoidcontrol information overhead

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The pipeline stage elements are designed to self-adapt to variable data widths without requiring external control signals. Each pipeline element autonomously detects and adjusts to the data width presented to it, using the data itself to control its operation. This self-service mechanism eliminates the need for additional control information while maintaining accurate handling of arbitrary data widths.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS11294687B2Data bus with multi-input pipeline

Publication Date: 2022.04.05 FRAUNHOFER GESELLSCHAFT ZUR FORDERUNG DER ANGEWANDTEN FORSCHUNG EV

AI summary

A data bus includes process elements and a linear main pipeline. Each process element is coupled to a linear pipeline having M stages arranged in series, each of the M stages including a buffer element configured to buffer a data bit sequence and to forward the buffered data bit sequence from a first of the buffer elements to a last of the buffer elements. The linear main pipeline includes N pipeline stage elements arranged in series. Each pipeline stage element is connected to the last buffer element of a respective linear pipeline and configured to read-out one or more of the buffered data bit sequences and to forward the read-out data bit sequences from one of N pipeline stag elements to a next of the N pipeline stage elements.