Multi-Kernel ADC Trigger Delays for Burst Signal Conversion
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Solution Overview
Problem
Current analog-to-digital converters (ADCs) lack the ability to support burst conversion and high-frequency power conversion applications, such as solar inverters and switched-mode power supplies, due to their inability to efficiently handle multiple measurements in a short time frame without complex timer synchronization.
Innovation Solution
An analog-to-digital conversion system comprising multiple ADC units with a delay unit that provides adjustable trigger signals via delay circuits, allowing for flexible and fast conversion of multiple analog signals into digital signals, enabling configurable measurement distribution on a logarithmic or exponential scale.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple timer units are used to support burst conversion measurements, then measurement capability is improved, but device complexity increases due to synchronization requirements
Solution Approach 1:
The ADC is divided into multiple independent conversion units (kernels), each capable of autonomous conversion operations. This segmentation allows parallel processing of multiple analog signals without requiring complex centralized timer synchronization, as each kernel operates independently with its own conversion timing.
Solution Approach 2:
Multiple ADC kernels share common control and data bus resources, allowing a single ADC device to function as multiple independent converters. This multi-functionality enables burst conversion capability without adding proportionally more timer units, reducing overall system complexity while maintaining versatility.
2Productivity
If conversion speed is increased to support high-frequency power conversion applications, then productivity is improved, but measurement precision may deteriorate due to reduced conversion time
Solution Approach 1:
Multiple ADC kernels operate in parallel continuously, with each kernel performing conversion operations without idle time. This continuous parallel operation maintains high conversion speed while allowing sufficient time for accurate conversion in each kernel, preventing precision deterioration that would occur in sequential single-kernel operation.
Solution Approach 2:
The system prepares multiple kernels in advance with identical or differentiated configuration parameters, allowing them to be triggered simultaneously or with predetermined delays. This preliminary preparation enables rapid response to high-frequency signals while maintaining conversion accuracy through pre-optimized kernel settings.
3Productivity
If multiple ADC units are used to increase conversion capacity, then productivity is improved, but device complexity increases
Solution Approach 1:
Multiple ADC kernels are merged into a single integrated device with shared control logic, data buses, and output interfaces. This merging approach increases conversion capacity by adding kernels while avoiding proportional increases in system complexity, as common resources are shared across all kernels rather than duplicating full ADC functionality for each unit.
Data Source
AI summary
An analog-to-digital conversion system includes at least two analog-to-digital conversion units configured to receive a plurality of analog signals and convert the analog signals to digital signals. The system further includes a delay unit including at least one delay circuit, wherein the analog-to-digital conversion system is configured to convey trigger signals to the analog-to-digital conversion units, and wherein at least one of the trigger signals is delayed via the at least one delay circuit.