Multi-Kernel CNN Hardware Accelerator for Parallel Processing
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Solution Overview
Problem
Existing hardware implementations of convolutional neural networks (CNNs) face inefficiencies in processing large datasets due to the time required for forward passing data through nodes, which becomes undesirable as the number of pixels increases, especially in analog systems.
Innovation Solution
The implementation of a mixed multiple kernel configuration that includes a structure with separate multi-set kernel, averaging multi-set kernel, and identical multi-set kernel modules, where each multi-kernel module comprises multiple unit cells with a control circuit and operation circuits, allowing for the application of weights to input signals and reducing the time for forward, backward, and update passes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional single-kernel hardware implementation is used, then the structure is simple, but the data processing time is excessive for large datasets
Solution Approach 1:
The patent divides the single kernel into multiple kernel copies (M copies) organized into multi-kernel modules. Each kernel copy can process different portions of the input data simultaneously, segmenting the computational workload to achieve faster processing while maintaining manageable structural complexity through modular organization.
Solution Approach 2:
The patent combines multiple kernel copies into integrated multi-kernel modules that share common control circuits and operation circuits. This merging approach allows parallel processing of multiple kernels while reducing overall hardware complexity by eliminating redundant components, thus improving processing speed without proportionally increasing device complexity.
2Productivity
If multiple kernel copies are implemented in parallel, then processing speed increases, but the number of components increases
Solution Approach 1:
The control circuit and operation circuits are designed as universal, shared resources that can serve multiple kernel copies. These circuits perform the same functions across different kernels, allowing the system to increase productivity through parallel kernel processing without proportionally increasing the quantity of circuit components.
Solution Approach 2:
Instead of fully duplicating all circuit components for each kernel copy, the patent selectively copies only the essential kernel-specific components while sharing common control and operation circuits among multiple kernels. This approach increases throughput by having multiple kernel copies while controlling component quantity through strategic sharing.
3Loss of time
If more multi-kernel modules are added, then the reduction factor (1/(M*P)) improves, but the device complexity increases
Solution Approach 1:
The patent implements dynamic resource allocation and control mechanisms that allow the system to adaptively manage multiple multi-kernel modules. This dynamic approach enables the system to achieve significant time reduction factors by coordinating multiple modules efficiently, while the intelligent resource management prevents linear increases in device complexity through optimized control strategies.
Data Source
AI summary
Methods and systems of implementing a convolutional neural network are described. In an example, a structure may receive input signals and distribute the input signals to a plurality of unit cells. The structure may include a plurality of multi-kernel modules that may include a respective set of unit cells. A unit cell may correspond to an element of a kernel being implemented in the convolutional neural network and may include a storage component configured to store a weight of a corresponding element of the kernel. A first pass gate of the unit cell may be activated to pass a stored weight of the unit cell to a plurality of operation circuits in the corresponding unit cell, such that the stored weight may be applied to the input signals. The structure may generate a set of outputs based on the application of the stored weights to the input signals.