Multi-Lane Data Transmission Testing for Timing Distortion Detection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In data transmission systems with multiple transmission lanes, it is challenging to detect timing distortions when the number of transmitters differs from the number of receivers, as traditional methods struggle to synchronize and test data across all lanes simultaneously.

Innovation Solution

A data transmission system that includes serializers to convert parallel input data into serial output data, output signal storage circuits to store and convert serial data into parallel data, and a comparison circuit to detect data transmission distortions by comparing output data from multiple transmitters, using a test read clock signal to synchronize the detection process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of transmitters is different from the number of receivers, then the system can handle asymmetric data transmission configurations, but it becomes difficult to simultaneously perform test operations on all transmission lanes and timing distortions cannot be detected

Engineering Contradiction:
Improveasymmetric transmitter-receiver configurationVSAvoidtiming distortion detection
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

A test receiver is introduced as an intermediary component that receives test signals from all transmitters simultaneously. This test receiver includes a parallel output that provides test data to a comparison circuit, enabling centralized testing and timing distortion detection across all transmission lanes without requiring individual receiver testing

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The testing functions of multiple receivers are merged into a single test receiver that can process test signals from all transmitters. The comparison circuit combines test data from all transmission lanes to perform unified timing distortion detection, replacing the need for multiple separate testing operations

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If transmitters are matched with receivers to individually test data transmitted through multiple transmission lanes, then testing can be performed, but transmission timing distortions between lanes occur and become difficult to detect

Engineering Contradiction:
Improveindividual lane testing capabilityVSAvoidtiming distortion detection
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The comparison circuit acts as an intermediary that receives test data from all transmitters through the test receiver's parallel output. It performs unified comparison operations on test data from multiple lanes simultaneously, enabling accurate timing distortion detection that individual receiver testing cannot achieve

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The test receiver serves multiple functions: it receives test signals from all transmitters, provides parallel output for simultaneous data access, and enables both individual lane testing and collective timing distortion detection through its connection to the comparison circuit

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10423565B2Data transmission systems having a plurality of transmission lanes and methods of testing transmission data in the data transmission systems
Publication Date: 2019.09.24 SK HYNIX INC
  • US10423565B2 patent drawing
  • US10423565B2 patent drawing
  • US10423565B2 patent drawing

AI summary

A data transmission system is provided. The data transmission system includes a plurality of data transmitters that respectively constitute a plurality of transmission lanes. Each of the plurality of data transmitters includes a serializer and an output signal storage circuit. The serializer coverts parallel input data into serial output data and outputs the serial output data. The output signal storage circuit stores the serial output data output from the serializer.