Multi-Layer Anti-Etch Via Structure for Gate Protection
Solution Overview
Problem
As the density of active and passive devices in modern integrated circuits increases, the proximity between via contacts and active devices decreases, leading to issues such as etching of metallic gate electrodes due to chemical resistance changes in anti-etch layers during the formation of conductivity-enhancing layers, resulting in structural weaknesses and potential damage to the gate electrodes.
Innovation Solution
A multi-layered anti-etch structure is formed with a first anti-etch layer resistant to peroxide and a second anti-etch layer resistant to acid, which surrounds the opening and protects the semiconductor substrate during the formation of conductivity-enhancing layers, preventing unwanted chemical reactions and etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single anti-etch layer is used during via formation, then the manufacturing process is simple, but the metallic gate electrode becomes vulnerable to etching damage from both peroxide and acid
Solution Approach 1:
The anti-etch structure is divided into two distinct layers: a first anti-etch layer resistant to peroxide and a second anti-etch layer resistant to acid. This segmentation allows each layer to specialize in protecting against specific chemical threats, ensuring comprehensive protection of the metallic gate electrode while maintaining a manageable structural complexity.
Solution Approach 2:
The patent employs a composite anti-etch structure combining materials with different chemical resistance properties. The first anti-etch layer uses peroxide-resistant material while the second anti-etch layer uses acid-resistant material, creating a composite system that leverages the strengths of each material to provide broad-spectrum chemical protection.
2Productivity
If the distance between via contact and active device is decreased to increase device density, then more devices can be integrated, but etching damage to the gate electrode occurs due to chemical resistance changes
Solution Approach 1:
The dual-layer anti-etch structure is formed in advance before the conductivity-enhancing layer formation process. This preliminary protective action ensures that when subsequent chemical processes occur during via formation, the gate electrode is already shielded, preventing etching damage and maintaining precise via dimensions even at high device densities.
3Ease of manufacture
If peroxide is used for cleaning the semiconductor structure, then organic contaminants are removed effectively, but the metallic gate electrode becomes susceptible to etching
Solution Approach 1:
The first anti-etch layer acts as an intermediary barrier between the peroxide cleaning solution and the metallic gate electrode. This intermediate layer allows effective cleaning to occur while preventing the peroxide from directly contacting and etching the gate electrode, thus resolving the conflict between cleaning effectiveness and electrode protection.
4Ease of manufacture
If acid is used during conductivity-enhancing layer formation, then metal contaminants are removed, but the metallic gate electrode suffers from etching damage
Solution Approach 1:
The second anti-etch layer serves as a protective intermediary during acid-based cleaning processes. It allows acid to effectively remove metal contaminants from the conductivity-enhancing layer while preventing the acid from reaching and etching the metallic gate electrode, thus enabling effective contamination removal without compromising electrode integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The multi-layered anti-etch structure effectively secures the critical dimension and shape of the opening, preventing etching of the metallic gate electrode and ensuring structural integrity by maintaining resistance to peroxide and acid, thus enhancing the reliability of the semiconductor structure.
Implementation Method 1
a first anti-etch layer resistant to peroxide and formed on a sidewall of the opening
Implementation Method 2
a second anti-etch layer resistant to acid and formed over the first anti-etch layer
Data Source
AI summary
A semiconductor structure includes a semiconductor substrate, a dielectric layer formed over the semiconductor substrate, a first anti-etch layer, a second anti-etch layer and a conductive material. The dielectric layer has an opening. The first anti-etch layer is formed on the sidewall of the opening and made of a material having resistance to peroxide. The second anti-etch layer is formed over the first anti-etch layer and made of a material having resistance to acid. The conductive material is formed within the opening and in contact with the second anti-etch layer.