Multi-Layer Barrier for BEOL Interconnect Stress Control
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Solution Overview
Problem
In the back end of line (BEOL) semiconductor fabrication, the continuous scaling to smaller dimensions makes it challenging to create thin barrier and seed layers that effectively inhibit copper migration and diffusion while maintaining electrical connectivity in densely packed integrated circuit devices.
Innovation Solution
A multi-layer barrier layer stack is formed, comprising an adhesion barrier layer and a stress-reducing barrier layer, which includes an alloy of tantalum and a transition metal, to reduce stress and prevent copper migration, along with a seed layer stack for efficient copper filling and electromigration resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the barrier and seed layers are made thin to accommodate narrow BEOL pitch geometry, then more room is available for bulk copper fill, but the ability to inhibit copper migration and diffusion deteriorates
Solution Approach 1:
The barrier layer is segmented into a multi-layer stack comprising a first barrier layer (e.g., tantalum) and a second barrier layer (e.g., tungsten), each with distinct functions. The first barrier layer provides copper diffusion barrier properties, while the second barrier layer provides stress control and adhesion, allowing the overall structure to be thin yet effective at preventing copper migration.
Solution Approach 2:
The barrier structure uses composite materials with different properties - combining tantalum (excellent copper barrier) with tungsten (stress control and low diffusion) creates a composite barrier system that achieves both copper migration inhibition and stress management in a thin profile, resolving the contradiction between thinness and effectiveness.
2Productivity
If continuous scaling to smaller dimensions is implemented to increase device density, then more devices can be packed on the substrate, but the difficulty of creating effective thin barrier and seed layers increases
Solution Approach 1:
Dividing the barrier function into multiple specialized layers makes fabrication more manageable at small dimensions. Each layer can be deposited and controlled independently using standard PVD or ALD processes, maintaining ease of manufacture while enabling continuous scaling to smaller dimensions for higher device density.
Solution Approach 2:
The invention changes the material parameters by selecting specific materials (tantalum, tungsten) with optimized properties for small-dimensional applications. These materials maintain their barrier and stress-control functions even when scaled to thinner dimensions, facilitating continuous scaling while preserving manufacturing effectiveness.
3Device complexity
If a single-layer barrier is used to simplify the structure, then the fabrication process is easier, but the ability to simultaneously control stress and prevent copper migration deteriorates
Solution Approach 1:
The barrier function is segmented into specialized layers: the first barrier layer (tantalum) handles copper migration prevention, while the second barrier layer (tungsten) handles stress control. This segmentation allows a relatively simple two-layer structure to achieve multiple functions that a single complex layer would struggle to provide.
Solution Approach 2:
Each barrier layer is designed with multi-functionality - the tantalum layer provides both diffusion barrier and partial stress control, while the tungsten layer provides stress control and additional diffusion protection. This multi-functionality allows the structure to maintain reliability without excessive complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The multi-layer barrier layer stack reduces stress gradients and enhances the reliability of interconnect structures by minimizing copper migration and electromigration, thereby improving the performance and density of semiconductor devices.
Implementation Method 1
A stress-reducing barrier layer is formed over the adhesion barrier layer. The stress-reducing barrier layer reduces the first stress level to provide a second stress level, less than the first stress level, across a second interface between the adhesion barrier layer, the stress-reducing barrier layer, and the dielectric layer.
Implementation Method 2
The barrier layer serves to inhibit migration or diffusion of copper into the dielectric and also to inhibit oxygen diffusion from the dielectric into the interconnect feature.
Data Source
AI summary
A method for forming an interconnect structure includes forming a recess in a dielectric layer of a substrate. An adhesion barrier layer is formed to line the recess. A first stress level is present across a first interface between the adhesion barrier layer and the dielectric layer. A stress-reducing barrier layer is formed over the adhesion barrier layer. The stress-reducing barrier layer reduces the first stress level to provide a second stress level, less than the first stress level, across a second interface between the adhesion barrier layer, the stress-reducing barrier layer, and the dielectric layer. The recess is filled with a fill layer.