Multi-Layer Buffer Region for Semiconductor Wafer Stress Relief
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Solution Overview
Problem
The formation of nitride semiconductors on silicon substrates leads to stress-induced cracks and dislocations due to lattice constant and linear expansion coefficient mismatches, resulting in high parasitic capacitance and warping issues in semiconductor wafers.
Innovation Solution
A semiconductor wafer structure with a multi-layer buffer region comprising alternating first and second layers, and a single layer buffer region with a lattice constant between the first and second layers, is used to reduce stress and parasitic capacitance, featuring a thicker single layer buffer region with a compound semiconductor material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a nitride semiconductor is formed on a silicon substrate, then low cost is achieved, but stress-induced cracks and dislocations occur due to lattice constant and linear expansion coefficient mismatches
Solution Approach 1:
The buffer region is segmented into multiple alternating layers of AlN and GaN materials. This multi-layer structure divides the stress distribution and reduces the overall stress between the silicon substrate and the nitride semiconductor layer, preventing stress-induced cracks and dislocations while maintaining cost-effectiveness of silicon substrate usage
Solution Approach 2:
A composite buffer region is created by combining AlN and GaN materials in alternating layers. The AlN layers provide stress relief due to their smaller lattice constant, while the GaN layers provide good crystallinity and serve as intermediate structures, collectively reducing stress-induced defects in the nitride semiconductor layer
2Stress or pressure
If a single layer structured buffer region comprised of GaN is formed thickly, then stress relief is improved, but piezo polarization occurs and parasitic capacitance increases due to low resistivity
Solution Approach 1:
The buffer region is divided into multiple alternating layers of AlN and GaN instead of using a single thick GaN layer. This segmentation maintains stress relief benefits while reducing the thickness of individual conductive layers, thereby minimizing piezo polarization effects and reducing parasitic capacitance
Solution Approach 2:
Different layers are assigned different materials with specific properties: AlN layers provide stress relief and have higher resistivity, while GaN layers provide good crystallinity. This local differentiation of material properties allows the buffer region to simultaneously achieve stress relief while minimizing parasitic capacitance through the higher resistivity of AlN layers
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure effectively reduces stress, warping, and parasitic capacitance, allowing for the formation of thicker semiconductor films with improved insulation and switching speed.
Implementation Method 1
Because this multi-layer structured buffer region has good stress relieving effects, it is possible to reduce cracks or dislocations being generated on the nitride semiconductor region
Implementation Method 2
A wafer on which a nitride semiconductor is formed using an epitaxial growth method on a substrate
Data Source
AI summary
A semiconductor wafer includes a substrate, a buffer region formed on one main surface of the substrate and formed from a compound semiconductor, and a main semiconductor region formed in the buffer region and formed from a compound semiconductor, wherein the buffer region includes a first multi-layer structured buffer region and a second multi-layer structured buffer region stacked with a plurality of alternating first layers and second layers, and a single layer structured buffer region arranged between the first multi-layer structured buffer region and the second multi-layer structured buffer region, the first layer is formed from a compound semiconductor which has a lattice constant smaller than a lattice constant of a material which forms the substrate, the second layer is formed from a compound semiconductor which has a lattice constant between a lattice constant of a material which forms the substrate and a lattice constant of a material which forms the first layer, and wherein the single layer structured buffer region is thicker than the first layer and the second layer, and is formed from a compound semiconductor which has a lattice constant between a lattice constant of a material which forms the first layer and a lattice constant of a material which forms the second layer.