Multi-layer Circuit Member Impedance Isolation

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Solution Overview

Problem

Multi-layer circuit boards face challenges in maintaining electrical isolation between vertically aligned ports, as energy transferred through reference planes can negatively impact signal integrity and reliability, especially in stacked modular jacks where a single module contains magnetics and circuitry for both ports.

Innovation Solution

Incorporating elongated areas of increased impedance within the reference planes to disrupt the direct energy transfer path between reference planes, thereby increasing the electrical separation and reducing the impact of energy from one port on the other, using a multi-layer circuit member design with specific conductive via configurations and slot structures to enhance isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If reference planes are used to provide electrical shielding and return paths in multi-layer circuit boards, then signal shielding is improved, but energy transfer between ports increases causing cross-talk and reduced reliability

Engineering Contradiction:
Improveelectrical shieldingVSAvoidsignal integrity
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The reference plane is segmented into first and second electrically connected regions separated by an area of increased impedance. This segmentation disrupts the continuous path for energy transfer while maintaining reference plane functionality for signal return paths, thereby reducing cross-talk between ports while preserving shielding effectiveness

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A localized area of increased impedance is introduced between the first and second regions of the reference plane. This local modification creates high impedance specifically at the interface between ports while maintaining low impedance reference planes elsewhere, allowing signals to maintain reference potential without enabling energy transfer between ports

Inventive Principle:
Principle #3Local quality

2Productivity

If vertically aligned ports are placed close together to increase port density, then productivity is improved, but electrical isolation between ports deteriorates leading to increased cross-talk

Engineering Contradiction:
Improveport densityVSAvoidelectrical isolation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A localized area of increased impedance is positioned between vertically aligned ports to provide targeted electrical isolation. This allows ports to be placed close together for high density while the localized impedance barrier prevents energy transfer, maintaining electrical isolation despite reduced physical separation

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The area of increased impedance acts as an intermediary element between vertically aligned ports. It provides a controlled barrier that blocks energy transfer while allowing the reference plane to continue functioning as a return path, enabling close port spacing without sacrificing electrical isolation

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively increases the electrical isolation between ports, improving signal integrity and reliability by forcing energy to travel a longer path, which dissipates the energy and reduces cross-talk, thereby enhancing the performance of the modular jack.

Implementation Method 1

An area of increased impedance is located between the first and second electrically connected regions of the first reference plane

Methodology Applied
Scientific EffectElectrical Impedance: Electrical Resistance

Data Source

PatentUS9462676B2Multi-layer circuit member with reference circuit
Publication Date: 2016.10.04 MOLEX INC
  • US9462676B2 patent drawing
  • US9462676B2 patent drawing
  • US9462676B2 patent drawing

AI summary

A multi-layer circuit member includes first and second electrically connected reference regions. At least a portion of a signal conductor is in proximity to the first region and a circuit component is in proximity to the second region. An area of increased impedance exists between the first and second electrically connected regions.