Multi-Layer Defect Classification in Semiconductor Manufacturing
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Solution Overview
Problem
Conventional defect inspection methods in semiconductor manufacturing only consider the effects of defects on the current layer, failing to account for impacts on other layers or the entire device, leading to limited classification precision and increased manufacturing cycle times.
Innovation Solution
A method that aligns inspected images of semiconductor layers with original design layout information of the processed layer and adjacent layers to classify defects based on geometric features, considering effects across multiple layers, thereby defining hotspots and classifying defects as either defects of interest or unimportant.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If defect inspection is performed layer by layer considering only the current layer, then the inspection process is simple and fast, but the classification precision is limited and manufacturing yield is reduced
Solution Approach 1:
The patent transitions from inspecting a single layer (2D inspection) to inspecting multiple layers simultaneously (3D multi-layer inspection). By stacking inspection data from the current layer, previous layer, and next layer, the system creates a three-dimensional defect analysis model that significantly improves classification precision while managing complexity through systematic data integration.
Solution Approach 2:
The patent segments the inspection process into distinct components: current layer inspection, previous layer inspection, and next layer inspection. Each layer is inspected and classified separately, then the results are integrated. This segmentation allows the complex multi-layer inspection to be managed as manageable modules, reducing overall system complexity while improving precision.
2Measurement precision
If multi-layer alignment and classification is performed, then defect classification precision is improved, but manufacturing cycle time increases
Solution Approach 1:
The patent performs preliminary alignment and classification operations during the inspection process itself, rather than as separate post-processing steps. By pre-aligning the current layer with previous and next layers before defect classification, and by pre-defining hotspot regions based on multi-layer analysis, the system reduces the time required for final defect determination and manufacturing decision-making.
Solution Approach 2:
The patent merges multiple inspection operations into a unified multi-layer inspection process. Instead of separately inspecting each layer and then separately analyzing their relationships, the system combines layer alignment, defect detection, and classification into a single integrated process, reducing total cycle time while maintaining high precision.
3Manufacturing precision
If only current layer patterns are inspected, then the inspection process is simple, but hotspot area identification is inaccurate
Solution Approach 1:
The patent extends hotspot identification from two-dimensional current layer analysis to three-dimensional multi-layer analysis. By considering patterns and defects across the current layer, previous layer, and next layer simultaneously, the system accurately identifies hotspots that may result from pattern interactions across multiple layers, significantly improving hotspot identification accuracy.
Solution Approach 2:
The patent introduces alignment data and pattern matching algorithms as intermediaries between raw inspection data and hotspot identification. These intermediaries facilitate the complex task of comparing patterns across multiple layers by providing standardized reference frameworks, making the multi-layer analysis process more manageable while improving accuracy.
Data Source
AI summary
A method for promoting semiconductor manufacturing yield comprising the following steps and a computer readable medium encoded with a computer program implementing the method is provided. First, a processed layer is inspected to generate an inspected image with defects thereon. Next, the inspected image is aligned to an original design layout information of the processed layer. In addition, the defects are classified according to geometric features of the original design layout information of the processed layer and at least previous one layer and/or at least next one layer.