Multi-Layer Hard Mask Etching for Vertical Substrate Features
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In integrated circuit fabrication, existing etching methods often result in sloped or bowed sidewalls and reduced feature sizes due to high energy ion collisions and redeposition of masking layer material, leading to suboptimal feature profiles in substrates.
Innovation Solution
A method involving multiple hard mask layers is used, where a feature pattern is formed and etched partially into the substrate, followed by selective etching of the hard mask layers, allowing further etching with innermost layers as masks, and finally removing all masking layers to achieve precise feature incorporation into integrated circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high energy etching ions are used to etch features into the substrate, then the etching speed and depth are improved, but the masking layer material is displaced and redeposited on sidewalls causing sloped profiles and residue
Solution Approach 1:
The masking layer is divided into multiple segments (first hard mask layer, second hard mask layer, third hard mask layer) with different etch selectivities. This segmentation allows different portions of the masking structure to be removed at different stages, preventing material displacement and redeposition while maintaining vertical sidewalls throughout the etching process.
Solution Approach 2:
The outer hard mask layers are selectively removed before completing the substrate etch. This preliminary action prevents the outer layers from interfering with the etching process, eliminating the source of displaced material that would otherwise redeposit on sidewalls and create sloped profiles.
2Device complexity
If a single masking layer is used for etching, then the process is simpler and faster, but the feature size at the bottom of openings is reduced due to sloped sidewalls
Solution Approach 1:
The masking system is segmented into multiple hard mask layers with different etch selectivities. This allows the outer layers to be selectively removed to expose fresh masking material during etching, maintaining vertical sidewalls and consistent opening sizes throughout the feature depth.
Solution Approach 2:
The etch selectivity parameter is varied across different masking layers. By assigning different etch selectivities to each layer, the process enables selective removal of outer layers while preserving inner layers, maintaining feature profile accuracy without requiring a single complex masking material.
3Manufacturing precision
If outer masking layers are removed during etching, then residue formation is reduced and vertical sidewalls are maintained, but additional processing steps are required
Solution Approach 1:
The selective removal of outer hard mask layers is merged with the substrate etching process itself. The etch chemistry automatically removes outer layers with different selectivity while etching the substrate, combining two functions into one integrated process step rather than requiring separate removal steps.
Solution Approach 2:
The multi-layer masking structure is self-regulating during etching. The etch process automatically removes outer layers that would otherwise cause problems, with the selective etch chemistry serving to both etch the substrate and clean up the masking structure simultaneously without external intervention.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of features with improved aspect ratios and reduced residues, enhancing the accuracy and size consistency of etched openings in substrates for integrated circuit fabrication.
Implementation Method 1
High energy etching ions can collide with such surfaces causing displacement of material of masking layer
Implementation Method 2
a feature is etched only partially into the substrate material using the plurality of hard mask layers with the feature pattern therein as a mask
Implementation Method 3
After the partial etching, at least one of the hard mask layers is etched selectively relative to the substrate material and remaining of the hard mask layers
Data Source
AI summary
The invention includes methods of etching features into substrates. A plurality of hard mask layers is formed over material of a substrate to be etched. A feature pattern is formed in such layers. A feature is etched only partially into the substrate material using the hard mask layers with the feature pattern therein as a mask. After the partial etching, at least one of the hard mask layers is etched selectively relative to the substrate material and remaining of the hard mask layers. After etching at least one of the hard mask layers, the feature is further etched into the substrate material using at least an innermost of the hard mask layers as a mask. After the further etching, the innermost hard mask layer and any hard mask layers remaining thereover are removed from the substrate, and at least a portion of the feature is incorporated into an integrated circuit.