Multi-layer lead frame package batch processing
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Solution Overview
Problem
Current lead frame assembly technologies for power semiconductor packages are inefficient due to the sequential clip attaching process, which reduces throughput and does not meet desired operational characteristics.
Innovation Solution
A multi-layer lead frame package design featuring electrically conductive structures with semiconductor dies positioned between them, with molding compound encapsulation and throughways for fluid communication, allowing for batch processing and improved electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sequential clip attaching process is used for each die, then electrical connectivity is achieved, but throughput is reduced
Solution Approach 1:
The patent applies preliminary action by pre-attaching multiple clips to a single lead frame before die attachment. This allows multiple dies to be attached simultaneously to the pre-prepared lead frame with multiple clips already in position, eliminating the need for sequential clip attaching for each die and thereby improving throughput while maintaining reliable electrical connectivity.
Solution Approach 2:
The patent segments the lead frame into multiple unit cells, each with its own clip structure. This segmentation allows independent preparation and attachment of multiple die-clip-lead frame assemblies in parallel, enabling batch processing rather than sequential processing, thus resolving the contradiction between achieving reliable electrical connectivity and maintaining high throughput.
2Reliability
If metal wires are bonded onto die pads and lead pads, then signal and power delivery is achieved, but wire bonding process complexity is introduced
Solution Approach 1:
The patent extracts the wire bonding process from the overall assembly by using direct mechanical and electrical connection through clips and lead frames. The clips make direct contact with die pads and lead frame pads, eliminating the need for intermediate wire bonding steps while maintaining signal and power delivery functionality, thus reducing process complexity.
Solution Approach 2:
The patent introduces clips as intermediary components that directly connect dies to lead frames. These clips serve as both mechanical support and electrical connection mediators, replacing the traditional wire bonding intermediary and simplifying the overall connection process while ensuring reliable signal and power delivery.
3Reliability
If clips are attached sequentially for each die, then proper electrical connection is established, but manufacturing time increases
Solution Approach 1:
The patent applies preliminary action by pre-attaching multiple clips to the lead frame in a single batch operation before die attachment. This allows all necessary electrical connections to be prepared in advance, enabling simultaneous die attachment to multiple clips without sequential processing, thereby establishing proper electrical connections while minimizing manufacturing time.
Solution Approach 2:
The patent merges the clip attaching operation with the die attachment operation by preparing multiple clips on the lead frame simultaneously. This combining of operations allows multiple electrical connections to be established in parallel during a single assembly cycle, reducing total manufacturing time while ensuring reliable electrical connection for each die.
Data Source
AI summary
The present invention features a method for fabricating a lead-frame package, having a first, second, third and fourth electrically conductive structures with a pair of semiconductor dies disposed therebetween defining a stacked structure. The first and second structures are spaced-apart from and in superimposition with the first structure. A semiconductor die is disposed between the first and second structures. The semiconductor die has contacts electrically connected to the first and second structures. A part of the third structure lies in a common plane with a portion of the second structure. The third structure is coupled to the semiconductor die.