Multi-Layer Underfill Structure for Reliable Semiconductor Packaging
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Solution Overview
Problem
Existing semiconductor packages face challenges in reliability due to issues such as unfill problems, cracks, and peeling of the mold layer, which can be exacerbated by the use of single-layer under-fill layers.
Innovation Solution
A semiconductor package design featuring a multi-layered under-fill layer structure, where a first under-fill layer contacts a side surface of a dam on the first semiconductor die, and a second under-fill layer is interposed between the first under-fill layer and the second semiconductor die, with a mold layer covering the sides and surfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single-layer under-fill layer is used, then the manufacturing process is simpler, but reliability deteriorates due to unfill problems, cracks, and peeling of the mold layer
Solution Approach 1:
The under-fill layer is divided into multiple layers (first under-fill layer and second under-fill layer) with different functions. The first under-fill layer fills the gap between dies and has higher viscosity to prevent unfill problems, while the second under-fill layer has lower viscosity to reduce stress and prevent cracking and peeling. This segmentation resolves the contradiction by improving reliability through functional differentiation while managing the increased structural complexity.
Solution Approach 2:
The patent uses composite material structure with two different under-fill layers having distinct viscosity characteristics. The first under-fill layer uses a material with higher viscosity for effective gap filling, while the second under-fill layer uses a material with lower viscosity for stress reduction. This composite approach improves reliability by combining the benefits of different material properties to address multiple failure modes simultaneously.
2Reliability
If the under-fill layer fillet is thicker and wider, then better filling is achieved, but the mold layer may peel and reliability decreases
Solution Approach 1:
The under-fill layer is segmented into two layers with the first layer providing the filling function (thicker and wider fillet) and the second layer providing the protective function (thinner profile that prevents mold layer peeling). This segmentation allows the system to achieve both effective filling and maintained mold layer adhesion, resolving the contradiction between filling effectiveness and mold layer strength.
Solution Approach 2:
Different regions of the under-fill structure have different qualities: the first under-fill layer has higher viscosity and forms a thicker fillet for effective filling, while the second under-fill layer has lower viscosity and forms a thinner profile to prevent stress concentration and mold layer peeling. This local quality differentiation resolves the contradiction by optimizing each region for its specific function.
3Reliability
If the space between semiconductor dies is larger, then easier assembly is achieved, but the under-fill layer becomes more exposed to the mold layer causing defects
Solution Approach 1:
The under-fill structure is segmented into two layers where the first layer fills the gap between dies effectively, and the second layer provides a protective cap that prevents exposure to the mold layer. This segmentation allows the package to prevent defects (improved reliability) while managing the assembly process through controlled layer formation.
Solution Approach 2:
The solution addresses the exposure problem by adding a vertical dimension with the second under-fill layer that caps the first layer. This dimensional approach prevents the under-fill material from being exposed to the mold layer in the horizontal plane, thereby preventing defects while maintaining the necessary gap space for assembly.
Data Source
AI summary
A semiconductor package includes a first semiconductor die, a first under-fill layer on an upper surface of the first semiconductor die, a second under-fill layer on the first under-fill layer, a second semiconductor die provided on the second under-fill layer, and a mold layer on side surfaces of the second semiconductor die, the second under-fill layer, and the upper surface of the first semiconductor die. The first semiconductor die includes a first substrate, a first redistribution pattern on the first substrate, a first redistribution dielectric layer provided on the first redistribution pattern, and a first dam on the first redistribution dielectric layer and along an edge of the first substrate, and the first under-fill layer contacts a side surface of the first dam.


