Multi-Level Arbitration for SOC Priority Inversion
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Solution Overview
Problem
Modern System On a Chip (SOC) and Network On a Chip (NOC) memory architectures face issues with priority inversion and deadlocks due to fixed or adaptive physical arbitration methods, leading to inefficiencies and stability hazards in multiprocessor systems.
Innovation Solution
Implementing a multi-level arbitration system with a first and second level of arbiters, where each transaction request is assigned a priority value comprising a Request Importance and Source Identity, allowing for decentralized control and reducing the risk of deadlocks and priority inversion by forwarding winning requests through multiple arbitration levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If physical arbitration with fixed or programmable priority is used at each multiplexing junction, then access to shared resources can be controlled, but priority inversion and deadlocks occur leading to system instability
Solution Approach 1:
The arbitration system is divided into multiple hierarchical levels. First-level arbiters handle local arbitration at each multiplexing junction, while a second-level arbiter handles global arbitration for the shared resource. This segmentation distributes the arbitration complexity across multiple simple components rather than requiring one complex centralized arbiter, resolving the contradiction between reliability and device complexity.
2Reliability
If round-robin arbitration algorithm is used to avoid priority inversion, then system stability improves, but delay optimization is lost and efficiency reduces
Solution Approach 1:
Different arbitration strategies are applied at different levels of the hierarchy. First-level arbiters use priority-based arbitration locally to maintain stability, while the second-level arbiter uses round-robin or other algorithms globally to ensure fairness and prevent deadlock. This local differentiation allows each level to optimize for its specific requirements, resolving the contradiction between stability and efficiency.
3Adaptability or versatility
If complex bus architecture with pre-emption and request retention is implemented, then arbitration flexibility improves, but system complexity increases and hazards remain under high load
Solution Approach 1:
The second-level arbiter acts as an intermediary between multiple first-level arbiters and the shared resource. It receives arbitration decisions from first-level arbiters and makes the final arbitration decision, providing flexibility without requiring complex architecture at each junction. This mediator approach simplifies the overall system while maintaining adaptability, resolving the contradiction between flexibility and complexity.
Data Source
AI summary
An integrated circuit device (100) comprising a first plurality of components (102-112), a second plurality of buses (114-124, 140, 142) for transmitting transaction requests from said components (102-112) to a resource (138) shared by said components (102-112) and a third plurality of arbiters (132-136) arranged in at least two levels of arbitration. Each transaction request has attached priority value that is used by the arbiters to determine which of the components should be granted access to the resource (138).