Multi-Level Cell Memory Using Parallel Bottom Electrode Contacts
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Solution Overview
Problem
Current non-volatile memory devices, such as flash memory, require high voltage for data storage and have limited data storage capacity per unit area, necessitating the development of a next-generation memory device that can store more data without increasing the number of memory cells and maintain data retention without refresh operations.
Innovation Solution
A method for forming a multi-level cell in a semiconductor memory device using three or more parallel bottom electrode contacts and phase-change materials, where the resistance is varied by changing the thickness, length, or resistivity of the bottom electrode contacts and the composition ratio or type of phase-change materials, allowing for the storage of two or more bits of data in a single memory cell without the need for refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If three or more parallel bottom electrode contacts and phase-change materials are formed to create multiple resistance levels, then integration density is improved, but device complexity increases
Solution Approach 1:
The memory cell is segmented into multiple parallel bottom electrode contacts (three or more) with different geometric configurations. Each contact structure serves as an independent resistance element, allowing multiple resistance levels to be achieved within a single memory cell without requiring multiple separate cells, thereby improving integration density while managing complexity through functional segmentation
Solution Approach 2:
Different bottom electrode contacts are designed with different local geometric qualities (different lengths, widths, or thicknesses) to create distinct resistance characteristics. This local differentiation allows each contact to provide a unique resistance level, enabling multi-level data storage within the same memory cell structure
2Quantity of substance
If the bottom electrode contact geometry is varied to create different resistance levels, then data storage capacity is improved, but manufacturing precision requirements increase
Solution Approach 1:
The resistance levels are achieved by systematically varying geometric parameters (length, width, thickness) of the bottom electrode contacts according to predetermined design specifications. This parameter-based differentiation allows for controlled creation of distinct resistance levels while maintaining compatibility with standard manufacturing processes, balancing data storage capacity with manufacturability
3Reliability
If phase-change materials with different composition ratios are used to implement resistance levels, then reliability is improved, but ease of manufacture deteriorates
Solution Approach 1:
Phase-change materials with different local composition ratios are deposited in different regions corresponding to different bottom electrode contacts. This spatial differentiation of material composition allows each contact to exhibit stable, distinct resistance characteristics, improving reliability while using established physical vapor deposition techniques that maintain reasonable manufacturing ease
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances integration density by enabling the storage of four or more resistance levels in a single memory cell, preventing resistance drift over time and allowing for clear identification of resistance changes, thus overcoming the limitations of existing non-volatile memory devices.
Implementation Method 1
forming three or more phase-change materials (GST) in parallel on the BECs
Data Source
AI summary
Provided is a method of forming a semiconductor memory cell in which in order to store two bits or more data in a memory cell, three or more bottom electrode contacts (BECs) and phase-change materials (GST) have a parallel structure on a single contact plug (CP) and set resistances are changed depending on thicknesses (S), lengths (L) or resistivities (ρ) of the three or more bottom electrode contacts, so that a reset resistance and three different set resistances enable data other than in set and reset states to be stored. Also, a method of forming a memory cell in which three or more phase-change materials (GST) have a parallel structure on a single bottom electrode contact, and the phase-change materials have different set resistances depending on composition ratio or type, so that four or more different resistances can be implemented is provided.