Multi-Level Converter for Memory Card Data Transfer
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Solution Overview
Problem
Current memory cards face limitations in data transfer rates between the memory controller and flash memory, as well as between the host and the memory card, affecting overall system performance.
Innovation Solution
Incorporating a multi-level converter that transforms data signals into voltage signals and vice versa, allowing for varying voltage levels based on multiple bits of data, thereby enhancing data transfer rates between the memory controller and flash memory, and between the host and the memory card.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional single-level signaling is used for data transfer between memory controller and flash memory, then the system structure remains simple, but the data transfer rate is limited
Solution Approach 1:
The patent applies parameter changes by transitioning from single-level signaling to multi-level signaling, where voltage levels are varied according to multiple bits of data. The memory controller encodes data using different voltage levels (e.g., higher voltage for '1', lower voltage for '0'), allowing multiple bits to be transmitted per signal cycle, thereby increasing the data transfer rate without proportionally increasing system complexity
Solution Approach 2:
The patent introduces another dimension to signal encoding by using voltage level amplitude as an additional encoding dimension. Instead of using only signal presence/absence or simple transitions, the system utilizes multiple discrete voltage levels to represent multiple bits of data simultaneously, effectively adding an amplitude dimension to the signaling scheme to boost throughput
2Productivity
If multi-level signaling is implemented to increase data transfer rate, then throughput improves, but signal integrity and error rate may deteriorate
Solution Approach 1:
The patent implements beforehand cushioning by incorporating error detection and correction mechanisms, as well as signal validation protocols, that are built into the communication protocol. These measures prepare the system in advance to handle potential signal degradation, allowing the multi-level signaling to operate at higher speeds while maintaining reliability through pre-established error handling capabilities
Solution Approach 2:
The patent employs feedback mechanisms where the receiving end (flash memory or host) sends acknowledgment signals and error status information back to the transmitting end (memory controller). This feedback loop allows for real-time detection and correction of transmission errors, enabling the system to maintain high data transfer rates while ensuring signal integrity through continuous monitoring and correction
Data Source
AI summary
A memory card including a memory controller, a memory system and a method to control a memory are provided. The memory card includes a flash memory, a memory interface outputting a writing data signal to be written into the flash memory, and a multi-level converter transforming the writing data signal into a writing voltage signal to be provided to the flash memory. The writing voltage signal has one of different voltage levels in accordance with plural bits of the writing data signal.