Multi-Level Lookup Tables for Vector Graphics Tessellation

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Solution Overview

Problem

Conventional tessellation methods in vector graphics processing result in large memory footprints, leading to increased bandwidth requirements, low cache hit rates, and decreased rendering performance due to inefficient data retrieval and storage methods.

Innovation Solution

Implementing a tessellation data processing method that uses multi-level lookup tables based on intersection coordinates to store effective data, reducing memory footprint and enhancing rendering performance by caching addresses of information tables and discarding unnecessary intersections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional tessellation methods store all pixel data and intersection information in memory, then complete rendering information is available, but memory footprint becomes large and bandwidth requirements increase

Engineering Contradiction:
Improverendering information completenessVSAvoidmemory footprint
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the memory storage structure into multiple levels: a first memory level stores only intersection coordinate information, while a second memory level stores detailed pixel data. This segmentation allows the system to reduce overall memory footprint by storing only essential intersection data in the first level, while maintaining complete rendering information in the second level when needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts and stores only the critical intersection coordinate information in the first memory level, separating it from the complete pixel data. This extraction principle allows the system to minimize memory usage by storing only the minimal necessary data (intersection coordinates) in the first level, while the detailed pixel information remains in the second level.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If all intersection data is stored and retrieved from memory, then accurate rendering is achieved, but data retrieval time increases and rendering performance decreases

Engineering Contradiction:
Improverendering accuracyVSAvoiddata retrieval time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary action by pre-calculating and storing only the essential intersection coordinate information in the first memory level before the actual rendering process. This preliminary storage of key coordinate data eliminates the need for time-consuming searches through complete pixel data during rendering, thereby reducing data retrieval time while maintaining rendering accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a simplified copy of the intersection data in the first memory level that contains only coordinate information necessary for rendering. This copy allows the system to quickly access intersection points without retrieving the complete detailed pixel data from the second memory level, thus reducing retrieval time while preserving rendering accuracy.

Inventive Principle:
Principle #26Copying

3Speed

If cache memory is added to reduce memory interaction, then access speed improves, but cache hit rate remains low and system bandwidth requirements stay high

Engineering Contradiction:
Improvedata access speedVSAvoidsystem bandwidth
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent applies local quality by creating a specialized first memory level that is locally optimized to store only intersection coordinate information. This local optimization ensures that the most frequently accessed data (intersection coordinates) is stored in a dedicated, easily accessible location, improving data access speed for rendering operations while reducing the bandwidth required for transferring complete pixel data.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP3961550B1Tessellation data processing method, system, medium and vector graphics processing device
Publication Date: 2023.11.15 VERISILICON MICROELECTRONICS (SHANGHAI) CO LTD
  • EP3961550B1 patent drawingFigure 1~2
  • EP3961550B1 patent drawingFigure 3~5
  • EP3961550B1 patent drawingFigure 6

AI summary

The present invention provides a tessellation data processing method, system, media, and vector graphics processing device; the method includes: according to specified coordinates of intersections, creating one or more levels of cache tables, wherein the intersections result from vector lines generated by tessellation intersecting lines parallel to an x-axis or y-axis-; storing in a content table addresses of information tables in memory, storing in a first level cache table an address of the content table in the memory, and storing an address of the first level cache table in the memory in a cache table one level higher than the first level cache table. The tessellation data processing method, system, media, and vector graphics processing device of the present invention store effective data in multi-level lookup tables based on coordinates of intersections, effectively reduce memory footprint, support multi-channel tessellation processing, and enhance the performance of vector graphics rendering.