Multi-Level Memory Array Buffering for Coupling Effects
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Solution Overview
Problem
As the number of data bits stored in each memory cell increases, it becomes difficult to ensure the reliability of memory devices due to variations in threshold voltages caused by coupling effects between adjacent memory cells, leading to challenges in accurately reading data.
Innovation Solution
A data storage system is designed with a memory cell array divided into two regions: one for storing up to N−1-bit data and another for storing N-bit data, where the memory controller performs a buffer program operation to divide N-bit data across multiple blocks in the first region and a main program operation to store it in the second region, using an address scramble manner to manage coupling effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of data bits stored per memory cell is increased, then the storage capacity is improved, but the reliability of data reading deteriorates due to threshold voltage variations from coupling effects
Solution Approach 1:
The memory cell array is divided into a first region with N memory blocks (each storing N-1 bits) and a second region (storing N bits). During buffer program operation, data is divisionally stored across the N memory blocks in the first region, and during main program operation, data is stored in the second region. This segmentation isolates coupling effects within the first region while maintaining reliable storage in the second region.
Solution Approach 2:
The first region with N memory blocks acts as an intermediary buffer between the data input and the second region. The buffer program operation stores data divisionally in this intermediary region, which then feeds into the main program operation for final storage in the second region, mediating the coupling effect impact.
2Productivity
If N-bit data is stored directly in the second region, then the programming speed is improved, but the coupling effect causes threshold voltage distribution to widen making reliable reading difficult
Solution Approach 1:
The buffer program operation performs preliminary action by divisionally storing N-bit data across N memory blocks in the first region before the main program operation stores data in the second region. This preliminary distribution prepares the data in a way that mitigates coupling effects during the final storage operation.
Solution Approach 2:
The programming process is segmented into two operations: buffer program operation that divisionally stores data in the first region, and main program operation that stores data in the second region. This segmentation allows the system to handle coupling effects systematically while maintaining programming efficiency.
3Reliability
If a buffer memory is used to store data before programming, then the data reliability is improved, but the buffer memory size increases
Solution Approach 1:
Instead of using a traditional buffer memory structure, the invention utilizes the memory cell array's own structure by dividing it into first and second regions. The first region with N memory blocks serves as a spatial buffer, transforming the buffer function from a separate memory component to an integrated region within the memory array, thereby reducing the need for additional buffer memory volume.
Solution Approach 2:
The memory cell array serves its own buffering function through the first region, eliminating or reducing the need for external buffer memory. The N memory blocks in the first region provide the buffering capability internally, allowing the system to maintain data reliability while minimizing additional memory volume requirements.
Data Source
AI summary
A method for a data storage system is disclosed. The method includes providing a memory cell array, and providing N blocks in a first region of the memory cell array, N being an integer greater than 1. Each cell of each block of the N blocks is configured to store no more than N−1 bits of data. The method further includes providing a block in the second region of the memory cell array. Each cell of the block in the second region is configured to store N bits of data. The method additionally includes configuring the data storage system so that when data is programmed to the memory cell array, N pages of the data are initially stored in N respective blocks of the first region of the memory cell array, and then the N pages of the data are stored in the block of the second region.