Multi-Level Processor Loops for Per-Core Voltage-Frequency Control
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Solution Overview
Problem
The increasing power requirements and energy consumption of computing devices due to advances in semiconductor processing and software inefficiencies have led to a need for improved energy efficiency and conservation in integrated circuits, particularly in computing systems.
Innovation Solution
Implementing multi-level loop control in computer processors with integrated voltage regulators and power control units to manage voltage and frequency independently for each core, allowing for fine-grained power management and dynamic power state transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If multi-level loop control is implemented with independent voltage and frequency regulation for each core, then energy efficiency is improved, but device complexity increases
Solution Approach 1:
The processor is divided into multiple independent cores, each with its own voltage regulator and power control unit. This segmentation allows each core to be controlled independently through separate control loops (inner loop for voltage, outer loop for frequency), enabling fine-grained power management. The segmentation of control functions into nested loops resolves the contradiction by allowing energy efficiency improvement through independent core control while managing complexity through modular architecture.
Solution Approach 2:
The system implements dynamic control through multi-level loops that continuously adjust voltage and frequency based on real-time processor state. The inner control loop dynamically regulates voltage to maintain core frequency, while the outer control loop dynamically adjusts frequency targets based on performance requirements. This dynamic adaptation enables the system to optimize energy efficiency under varying load conditions while the automated control mechanisms manage the complexity of real-time adjustments.
2Loss of energy
If fine-grained power management is implemented through independent core control, then power consumption is reduced, but control complexity increases
Solution Approach 1:
The power management system employs feedback control through nested loops: the inner loop provides feedback control of voltage based on actual core frequency measurements, while the outer loop provides feedback control of frequency targets based on performance monitoring. This feedback mechanism enables automatic adjustment of power consumption without requiring complex manual intervention, as the system self-regulates based on real-time conditions, reducing power loss while managing control complexity through automated feedback mechanisms.
Solution Approach 2:
Each processor core is equipped with its own voltage regulator and power control unit that autonomously manage power delivery. The control loops operate independently to self-adjust voltage and frequency without requiring centralized complex control, allowing each core to serve its own power management needs. This self-service approach reduces overall control complexity while enabling fine-grained power management across multiple cores.
3Loss of energy
If dynamic power state transitions are implemented, then energy conservation is improved, but system complexity increases
Solution Approach 1:
The system enables dynamic power state transitions through multi-level control loops that continuously monitor processor performance and power consumption. The outer control loop dynamically adjusts frequency targets to transition between performance states, while the inner control loop dynamically adjusts voltage to support these transitions. This dynamic capability allows the system to conserve energy by transitioning to lower power states when appropriate, while the automated loop control mechanisms manage the complexity of state transitions.
Solution Approach 2:
The control loops operate periodically to monitor processor state and adjust power delivery accordingly. The inner voltage control loop and outer frequency control loop execute at different periodic intervals, with the inner loop operating at higher frequency for rapid voltage adjustments and the outer loop operating at lower frequency for strategic frequency transitions. This periodic action enables energy conservation through regular power state optimizations while managing system complexity through structured periodic control cycles.
Data Source
AI summary
In an embodiment, a processor includes processing cores, and a central control unit to: concurrently execute an outer control loop and an inner control loop, wherein the outer control loop is to monitor the processor as a whole, and wherein the inner control loop is to monitor a first processing core included in the processor; determine, based on the outer control loop, a first control action for the first processing core included in the processor; determine, based on the inner control loop, a second control action for the first processing core included in the processor; based on a comparison of the first control action and the second control action, select one of the first control action and the second control action as a selected control action; and apply the selected control action to the first processing core. Other embodiments are described and claimed.