Multi-Level Semiconductor Device with Oxide-to-Oxide Bonding

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Solution Overview

Problem

Current methods for constructing RGB LEDs, image sensors, and solar cells face challenges such as high costs, inefficiencies, and thermal expansion coefficient mismatches, which hinder the development of more efficient and cost-effective technologies for these applications.

Innovation Solution

The use of layer transfer techniques like ion-cut, porous silicon approaches, and oxide-to-oxide bonding allows for the construction of multi-level semiconductor devices with integrated circuits and optical waveguides, enabling the creation of efficient RGB LEDs, image sensors, and solar cells at lower temperatures and reduced costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional bonding methods are used to construct multi-level semiconductor devices, then device integration is achieved, but thermal expansion coefficient mismatches cause stress and reliability issues

Engineering Contradiction:
Improvedevice reliabilityVSAvoidthermal expansion mismatch stress
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediate oxide layer between dissimilar semiconductor materials with different thermal expansion coefficients. This oxide layer acts as a stress-buffering intermediary that accommodates thermal expansion mismatches during temperature cycling, preventing crack formation and delamination while maintaining reliable device operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Strength

If high temperature processing is used to bond semiconductor layers, then strong bonding is achieved, but substrate damage and process complexity increase

Engineering Contradiction:
Improvebond strengthVSAvoidprocessing temperature
Core Design Contradiction:
StrengthVSTemperature

Solution Approach 1:

The patent changes the bonding parameters by performing oxide-to-oxide bonding at relatively low temperatures (below 400°C) compared to traditional direct semiconductor bonding which requires high temperatures. This parameter change achieves sufficient bond strength while avoiding substrate damage and reducing process complexity.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If conventional LED construction methods are used, then device functionality is achieved, but production costs and thermal processing requirements are high

Engineering Contradiction:
Improveproduction costVSAvoidthermal processing temperature
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

The patent segments the LED structure into multiple independent layers (n-type layer, active layer, p-type layer) that are separately formed on individual substrates using low-temperature oxide-to-oxide bonding. This segmentation allows each layer to be optimized independently and bonded at low temperatures, reducing production costs and thermal processing requirements while maintaining device functionality.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the production of more efficient and cost-effective RGB LEDs, image sensors, and solar cells by reducing thermal processing requirements and improving material compatibility, thereby enhancing their performance and reducing production costs.

Implementation Method 1

an oxide layer disposed between said first level and said second level, wherein said second level is bonded to said oxide layer, and wherein said bonded comprises oxide to oxide bonds

Methodology Applied
Scientific EffectOxide-to-oxide bonding: Chemical Bonding

Implementation Method 2

a second level comprising an optical waveguide

Methodology Applied
Scientific EffectOptical waveguide: Waveguide (optics)

Data Source

PatentUS10943934B2Multilevel semiconductor device and structure
Publication Date: 2021.03.09 MONOLITHIC 3D INC
  • US10943934B2 patent drawing
  • US10943934B2 patent drawing
  • US10943934B2 patent drawing

AI summary

A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including an optical waveguide, where the second level is disposed above the first level, where the first level includes crystalline silicon; and an oxide layer disposed between the first level and the second level, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.