Multi-level Signal Receiver Training for Memory Data Integrity

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Solution Overview

Problem

Current semiconductor memory devices face challenges in achieving high communication speeds between memory controllers and memory devices, particularly in retaining data integrity and efficiency with multi-level signaling schemes, where sense amplifiers require training to effectively compare multi-level signals with reference voltages.

Innovation Solution

A multi-level signal receiver is designed with (M−1) sense amplifiers that compare multi-level signals with (M−1) reference voltages, generating comparison signals to produce a target data signal. An equalization controller adjusts voltage intervals and reference voltage levels during training modes to enhance the performance of these sense amplifiers, ensuring accurate data transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multi-level signaling is used to increase communication speed, then data transmission rate is improved, but data integrity and signal comparison accuracy deteriorate

Engineering Contradiction:
Improvedata transmission rateVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by implementing a training mode before normal data transmission. During training mode, the equalization controller adjusts the reference voltages of the sense amplifiers based on training data signals to optimize their comparison thresholds. This preliminary calibration ensures that the sense amplifiers are properly configured before processing actual data, thereby maintaining data integrity while enabling high-speed multi-level signaling.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If sense amplifiers are used to compare multi-level signals with reference voltages, then data reception accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvedata reception accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the equalization controller to perform multiple functions: it controls the reference voltage generation for sense amplifiers, manages the training mode operation, adjusts voltage intervals dynamically, and coordinates the overall equalization process. This multi-functional approach consolidates what would otherwise require separate circuits, reducing device complexity while maintaining high measurement precision for multi-level signal reception.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If training mode is implemented to adjust sense amplifier performance, then data integrity is improved, but training time and system overhead increase

Engineering Contradiction:
Improvedata integrityVSAvoidtraining time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies periodic action by implementing training mode only during specific intervals rather than continuously. The equalization controller switches between training mode and normal data transmission mode, performing reference voltage adjustment and equalization only when necessary (e.g., after channel conditions change or initially). This periodic approach ensures data integrity is maintained through proper sense amplifier calibration while minimizing the time loss associated with training operations.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11587609B2Multi-level signal receivers and memory systems including the same
Publication Date: 2023.02.21 SAMSUNG ELECTRONICS CO LTD
  • US11587609B2 patent drawing
  • US11587609B2 patent drawing
  • US11587609B2 patent drawing

AI summary

A multi-level signal receiver includes a data sampler having (M−1) sense amplifiers therein, which are configured to compare a multi-level signal having one of M voltage levels with (M−1) reference voltages, to thereby generate (M−1) comparison signals. The data sampler is further configured to generate a target data signal including N bits, where M is an integer greater than two and N is an integer greater than one. An equalization controller is provided, which is configured to train the (M−1) sense amplifiers by: (i) adjusting at least one of (M−1) voltage intervals during a first training mode, and (ii) adjusting levels of the (M−1) reference voltages during a second training mode, based on equalized values of the (M−1) comparison signals, where each of the (M−1) voltage intervals represents a difference between two adjacent voltage levels from among the M voltage levels.