Multi-Level Stacked Redistribution Package for Thinner Form Factor

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Solution Overview

Problem

Current package designs are limited in achieving a thinner and more compact form factor due to the thickness of substrates and the inefficiencies in electrical current paths between discrete devices, which affects performance and structural stability.

Innovation Solution

The implementation of multiple redistribution portions with thinner dielectric layers and redistribution interconnects, allowing for a more compact package structure and improved electrical connectivity, along with encapsulation layers that house discrete devices to enhance structural stability and reduce warpage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If traditional substrates are used in package design, then structural support is provided, but the package thickness and overall size increase

Engineering Contradiction:
Improvepackage thicknessVSAvoidstructural support
Core Design Contradiction:
Length of moving objectVSStrength

Solution Approach 1:

The substrate is divided into multiple thin dielectric layers (first dielectric layer, second dielectric layer, third dielectric layer) separated by redistribution portions. This segmentation allows the total substrate thickness to be reduced while maintaining structural integrity through the distributed layer structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces vertical stacking of redistribution portions between dielectric layers, transitioning from a planar substrate structure to a multi-level three-dimensional architecture. This enables shorter current paths and reduced package thickness while maintaining electrical connectivity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of energy

If traditional substrate designs are used, then manufacturing simplicity is maintained, but electrical current paths between discrete devices become inefficient and parasitic losses increase

Engineering Contradiction:
Improveparasitic lossesVSAvoidsubstrate structure complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent implements multi-level vertical stacking of redistribution portions, creating three-dimensional current paths that significantly shorten the distance between discrete devices. This dimensional transition reduces parasitic inductance and resistance while enabling more efficient electrical connectivity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Different dielectric layers are assigned different material properties and thicknesses optimized for specific functions. For example, the first dielectric layer has different characteristics than the second and third layers, allowing local optimization of electrical performance and signal integrity in different regions of the package.

Inventive Principle:
Principle #3Local quality

3Length of moving object

If multiple redistribution portions with thinner dielectric layers are implemented, then package thickness is reduced and electrical performance is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvepackage thicknessVSAvoidmanufacturing process complexity
Core Design Contradiction:
Length of moving objectVSEase of manufacture

Solution Approach 1:

The substrate fabrication is segmented into discrete, repeatable steps for forming each dielectric layer and redistribution portion. This modular approach, where layers are built sequentially (first dielectric layer, then first redistribution portion, then second dielectric layer, etc.), makes the complex multi-level structure manufacturable through standardized sequential processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each dielectric layer is formed with preliminary patterning and preparation steps before subsequent redistribution portions are added. This preliminary action ensures that each layer is properly prepared in advance, reducing manufacturing defects and simplifying the overall fabrication process despite the multi-level complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11502049B2Package comprising multi-level vertically stacked redistribution portions
Publication Date: 2022.11.15 QUALCOMM INC
  • US11502049B2 patent drawing
  • US11502049B2 patent drawing
  • US11502049B2 patent drawing

AI summary

A package that includes a first redistribution portion, a second redistribution portion, a third redistribution portion, a first encapsulation layer coupled to the first redistribution portion and the third redistribution portion, a first discrete device encapsulated by the first encapsulation layer, wherein the first discrete device is located between the first redistribution portion and the third redistribution portion, a second encapsulation layer coupled to the first redistribution portion and the second redistribution portion, and a second discrete device encapsulated by the second encapsulation layer, wherein the second discrete device is located between the first redistribution portion and the second redistribution portion.