Multi-Level Turn-Off Circuit for Over-Current Voltage Spike Control
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Solution Overview
Problem
High-voltage and high-current applications require efficient power electronic devices capable of operating at elevated temperatures, but existing technologies fail to control power device turn-off in a controlled manner during over-current conditions, leading to high voltage overshoot spikes and potential device damage.
Innovation Solution
A multi-level turn-off circuit that includes an output high driver, an output low driver, and a clamp circuit to gradually reduce the gate voltage of power devices, such as MOSFETs or IGBTs, in multiple stages when an over-current condition is detected, ensuring controlled turn-off and minimizing surge current spikes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a power device is turned off rapidly during over-current conditions, then the turn-off speed is improved, but voltage overshoot spikes increase causing potential device damage
Solution Approach 1:
The gate voltage reduction is divided into multiple discrete levels (first level, second level, third level) rather than a single step change. Each level corresponds to a specific voltage threshold that triggers the next stage of turn-off, segmenting the overall turn-off process into controlled phases that prevent excessive voltage spikes while maintaining adequate turn-off speed.
Solution Approach 2:
The circuit performs preliminary voltage reduction to a first level before completing the full turn-off. This preliminary action reduces the gate voltage to an intermediate state that limits the rate of current change, thereby preventing voltage overshoot spikes while still progressing toward complete turn-off. The preliminary action prepares the system for the final turn-off without causing harmful transients.
2Object-affected harmful factors
If the gate voltage is reduced in multiple stages, then voltage overshoot spikes are reduced, but the turn-off process duration increases
Solution Approach 1:
The turn-off process dynamically adjusts the gate voltage based on real-time current conditions. The circuit monitors the current flowing through the power device and automatically transitions between voltage levels as current thresholds are crossed. This dynamic adaptation allows the system to maintain multiple voltage levels during the turn-off process while ensuring the total duration remains acceptable for protecting the device.
Solution Approach 2:
The circuit uses feedback from current sensing to control the gate voltage reduction stages. The multi-level turn-off circuit monitors the current status and adjusts the gate voltage accordingly, transitioning between levels based on feedback signals. This feedback mechanism ensures that the extended turn-off duration is optimized to prevent voltage spikes while maintaining efficient operation.
3Device complexity
If a single-level turn-off is used, then the device complexity is reduced, but surge current spikes increase causing device damage
Solution Approach 1:
The gate driver circuit performs multiple functions: normal turn-off operation, over-current detection, and multi-level voltage reduction. By integrating these functions into a single circuit block, the design achieves surge current spike protection without proportionally increasing overall device complexity. The same gate driver that controls normal switching also handles protective turn-off sequences.
Solution Approach 2:
The multi-level turn-off circuit acts as an intermediary between the control signal and the power device gate. Rather than directly switching the gate from high to low voltage, the intermediary circuit introduces intermediate voltage levels that smooth the transition. This intermediary function protects against surge current spikes while adding manageable complexity to the control system.
Data Source
AI summary
Methods, apparatus, systems, and articles of manufacture are disclosed for a multi-level turn-off circuit. An example power delivery circuit includes a two-level turn-off circuit to be coupled to a first switch to reduce a first gate voltage of the first switch from a first voltage to a second voltage when a current flowing through the first switch is greater than an over-current threshold, the two-level turn-off circuit including a second switch, a voltage-current-voltage buffer to reduce a second gate voltage of the second switch from a third voltage to a fourth voltage, and a comparator circuit to turn off the second switch when the second gate voltage is the fourth voltage, and a driver to be coupled to the first switch to turn off the first switch when the second gate voltage is the fourth voltage.