Multi-Level Voltage Detection with One Comparator and Fast Tracking

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Solution Overview

Problem

Existing multi-level voltage detector circuits face challenges in balancing speed, accuracy, size, and complexity, with flash ADC designs occupying large space and consuming high power, while SAR ADC designs are slow and require additional circuitry.

Innovation Solution

A voltage detector with a resistor divider circuit, a switching circuit, and a single comparator, utilizing a state machine with N+1 decoder outputs to activate switches and provide fast voltage tracking without excessive parasitic load capacitance, offering a compact and low-power solution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If flash ADC with multiple comparators is used, then voltage detection speed is improved, but circuit area and power consumption increase

Engineering Contradiction:
Improvevoltage detection speedVSAvoidcircuit area
Core Design Contradiction:
SpeedVSArea of stationary object

Solution Approach 1:

Multiple comparator functions are merged into a single comparator by using a switching circuit that sequentially connects different voltage divider nodes to the comparator input. This consolidation reduces the number of comparators from multiple to one, thereby reducing circuit area while maintaining multi-level voltage detection capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system uses a dynamic switching circuit that changes connections based on the detection phase. The switching circuit dynamically connects different voltage divider nodes to the comparator in sequence, enabling a single comparator to perform multiple comparison functions that would traditionally require multiple static comparators.

Inventive Principle:
Principle #15Dynamics

2Speed

If flash ADC with multiple comparators is used, then voltage detection speed is improved, but power consumption increases

Engineering Contradiction:
Improvevoltage detection speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

Multiple comparator functions are merged into a single comparator by using a switching circuit that sequentially connects different voltage divider nodes to the comparator input. This consolidation reduces the number of comparators from multiple to one, thereby reducing circuit area while maintaining multi-level voltage detection capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system uses a dynamic switching circuit that changes connections based on the detection phase. The switching circuit dynamically connects different voltage divider nodes to the comparator in sequence, enabling a single comparator to perform multiple comparison functions that would traditionally require multiple static comparators.

Inventive Principle:
Principle #15Dynamics

3Use of energy by stationary object

If SAR ADC with single comparator is used, then power consumption and circuit area are reduced, but detection speed decreases

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage detection speed
Core Design Contradiction:
Use of energy by stationary objectVSSpeed

Solution Approach 1:

The voltage divider circuit pre-divides the input voltage into multiple discrete levels before comparison. This preliminary action creates ready-to-compare voltage levels, eliminating the need for iterative binary search and enabling direct comparison in a single clock cycle, thus speeding up detection while using only one comparator.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system skips the iterative binary search process by directly comparing the input voltage against pre-established voltage divider levels in a single comparison step. This rushing through the detection process in one clock cycle eliminates the multiple cycles required by SAR ADC, significantly improving speed.

Inventive Principle:
Principle #21Skipping (Rushing through)

4Measurement precision

If multiple comparators are used, then voltage detection accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvevoltage detection accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Multiple comparator functions are merged into a single comparator by using a switching circuit that sequentially connects different voltage divider nodes to the comparator input. This consolidation reduces the number of comparators from multiple to one, thereby reducing circuit area while maintaining multi-level voltage detection capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The switching circuit acts as an intermediary that manages the connection between the voltage divider nodes and the single comparator. This intermediary component enables one comparator to effectively perform multiple comparison functions, reducing complexity while maintaining accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

5Speed

If flash ADC is used, then voltage detection speed is improved, but parasitic load capacitance increases

Engineering Contradiction:
Improvevoltage detection speedVSAvoidparasitic load capacitance
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

Multiple comparator functions are merged into a single comparator by using a switching circuit that sequentially connects different voltage divider nodes to the comparator input. This consolidation reduces the number of comparators from multiple to one, thereby reducing circuit area while maintaining multi-level voltage detection capability.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11808792B2Multi-level voltage detector
Publication Date: 2023.11.07 TEXAS INSTRUMENTS INC
  • US11808792B2 patent drawing
  • US11808792B2 patent drawing
  • US11808792B2 patent drawing

AI summary

A voltage detector comprises an input, a resistor divider circuit having resistors coupled in series with one another between the input and a reference node, and N intermediate nodes joining adjacent pairs of the resistors. The voltage detector has N switches coupled to the respective intermediate nodes, as well as a comparator with an input coupled to the switches, a state machine having an input coupled to the output of the comparator, and a decoder having N decoder outputs coupled to respective control terminals of the N switches.