Multi-Link Frame Error Rate Updating for Data Rate Selection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Electronic devices experience reduced transmission success rates and increased delay times due to unreliable frame error rate (FER) information that does not reflect changes in link state, leading to inefficient packet transmission and retransmission.

Innovation Solution

The electronic device includes a communication circuit to transmit/receive data through multiple links, a memory to store mapping data of data rates and FERs, and a processor to identify and update FER information based on actual packet transmission, enabling accurate modulation level and data rate determination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the electronic device uses previous FER information to determine modulation level and data rate, then the device can maintain continuous operation, but the FER information does not reflect changed link state leading to reduced transmission success rate

Engineering Contradiction:
Improvetransmission success rateVSAvoidFER information accuracy
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent implements a feedback mechanism where the electronic device actively transmits test packets through each link and measures the actual FER based on received acknowledgments. This real-time feedback updates the FER information stored in memory, ensuring that modulation level and data rate selections are based on current link conditions rather than outdated information, thereby resolving the contradiction between maintaining continuous operation and preserving information accuracy.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent performs preliminary FER measurement actions by transmitting test packets before actual data transmission. This preliminary action updates the FER information in advance, ensuring that when the device needs to determine modulation level and data rate, it has current and accurate FER information available, thus preventing transmission failures caused by using outdated link state information.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the electronic device transmits packets through links with outdated FER information, then data transmission can continue, but delay time increases due to packet transmission failures and retransmissions

Engineering Contradiction:
Improvedata transmission efficiencyVSAvoiddelay time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent uses feedback from acknowledgment packets to continuously update FER measurements. This ensures that the device has current link quality information available before transmitting data packets, preventing transmission failures and the associated retransmission delays, thereby maintaining high productivity without time loss.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent performs preliminary FER updates by transmitting test packets and receiving acknowledgments before actual data transmission. This preliminary action ensures that the link is properly characterized and the device has current FER information, preventing subsequent transmission failures and reducing delay time while maintaining efficient data transmission.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12445235B2Electronic device for updating frame error rate of link and operation method of electronic device
Publication Date: 2025.10.14 SAMSUNG ELECTRONICS CO LTD
  • US12445235B2 patent drawing
  • US12445235B2 patent drawing
  • US12445235B2 patent drawing

AI summary

An embodiment of an electronic device according to the present disclosure may comprise: a communication circuit for transmitting or receiving data through a plurality of links; a memory for storing mapping data in which data rates and frame error rates for the plurality of links are mapped; and a processor operatively connected to the communication circuit and the memory, wherein the processor is configured to: in response to a request for transmitting a packet corresponding to a first type, identify a link, through which the number of packets less than a predesignated value have been transmitted or received, from among the plurality of links; transmit or receive a plurality of packets corresponding to a second type through the identified link; identify frame error rates for the plurality of packets corresponding to the second type; and update the mapping data on the basis of the identified frame error rates.