Multi-Load Circuit Topology for Signal Integrity on PCB Lines

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Solution Overview

Problem

Existing circuit topologies for multiple loads on a motherboard suffer from signal integrity issues due to mismatched impedances in transmission lines, leading to noise generation and non-monotonic signal waveforms, which can damage integrated circuits and reduce system stability.

Innovation Solution

The proposed circuit topology includes a driving terminal connected to six loads in parallel via transmitting lines, where the two outer lines have greater widths to reduce impedance mismatches, and resistors are strategically placed between loads to minimize noise, with the most important loads positioned nearest and farthest from the driving terminal to enhance signal integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If standard width transmission lines are used to connect driving terminal to multiple loads, then the circuit topology is simple and easy to manufacture, but impedance mismatch occurs leading to noise signals and non-monotonic waveforms

Engineering Contradiction:
Improvesignal integrityVSAvoidtransmission line configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by varying the width of transmission lines at specific locations (wider at beginning and end, narrower in middle) to optimize impedance matching at critical interfaces with loads, while maintaining standard width elsewhere to preserve manufacturing simplicity. This localized modification resolves the contradiction by improving signal integrity only where needed without unnecessarily complicating the overall transmission line structure.

Inventive Principle:
Principle #3Local quality

2Reliability

If transmission lines are configured to reduce impedance mismatch, then noise signals are reduced and signal integrity is improved, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvesignal integrityVSAvoidPCB fabrication
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the geometric parameter (width) of transmission lines at specific locations to achieve impedance matching. By modifying only the width parameter rather than the entire transmission line structure, and by using standard PCB fabrication techniques, the solution improves signal integrity while maintaining ease of manufacture. The wider lines at beginning/end and narrower lines in middle are achieved through standard photolithography processes.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If resistors are added between loads to reduce noise, then signal integrity is improved, but device complexity and component count increase

Engineering Contradiction:
Improvesignal stabilityVSAvoidcircuit component count
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces resistors as intermediary elements between adjacent loads to dampen reflections and reduce noise. These resistors act as mediators that absorb excess energy and prevent signal oscillations. While they do increase component count, the resistors are placed only between specific adjacent loads rather than throughout the entire circuit, minimizing the increase in device complexity while achieving the desired signal stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly reduces noise signals and maintains system voltage within standard ranges, ensuring stable signal transmission and improved circuit integrity by minimizing non-monotonic phenomena and maintaining voltage within the standard range of 0V to 3.3V.

Implementation Method 1

widths of the transmitting lines 110 and 160 are both greater than widths of the other transmitting lines 120, 130, 140, and 150... impedances of the transmitting lines 110 and 160 are less than impedances of the other transmitting lines 120, 130, 140, and 150, therefore noise signals generated by the driving signal on the transmitting lines are weaker

Methodology Applied
Scientific EffectImpedance matching: Electrical Impedance Tomography

Implementation Method 2

the resistor RS1 is connected between the loads 300 and 400, and the resistor RS2 is connected between the loads 400 and 500. The resistors RS1 and RS2 can reduce non-monotonic phenomenon generated by the loads 300 and 400

Methodology Applied
Scientific EffectElectrical resistance: Electrical Resistance

Data Source

PatentUS20100253383A1Circuit topology for multiple loads
Publication Date: 2010.10.07 CLOUD NETWORK TECH SINGAPORE PTE LTD
  • US20100253383A1 patent drawing
  • US20100253383A1 patent drawing
  • US20100253383A1 patent drawing

AI summary

A circuit topology for multiple loads includes a driving terminal for transmitting a driving signal, a number of transmitting lines, and a number of loads operable to receive the driving signal from the driving terminal. The number of loads are connected to the driving terminal one by one via the number of transmitting lines. Two transmitting lines of the number of transmitting lines, which are nearest and farthest respectively from the driving terminal, are both greater than widths of the other transmitting lines.