Vehicle Multi-Master Ring Buffers for Collision-Free Common Block Access

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Solution Overview

Problem

In multi-master module systems, simultaneous access to a common block by multiple master devices can lead to collisions and bottlenecks, delaying data processing and increasing system complexity, especially when urgent functions need to be executed quickly.

Innovation Solution

A control method using a ring communication topology with a Global Buffer Unit (GBU) and Local Buffer Units (LBUs) to manage access to a common block, where each master has a 2D buffer, and data is transmitted in one direction, allowing priority-based access to prevent collisions and minimize bottlenecks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple master devices simultaneously access a common block using first-come-first-served method, then system independence is maintained, but collision occurs and data processing is delayed

Engineering Contradiction:
Improvesystem independenceVSAvoiddata processing delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements a preliminary arbitration mechanism where master devices register their access requests with the slave device before actual access occurs. The slave device maintains a registration table that records which master devices want to access the common block and their priority levels. This preliminary registration and arbitration process prevents collisions by establishing an access order before simultaneous access attempts occur, thereby maintaining system independence while eliminating processing delays.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple master devices access a common block in order of access first, then collision is prevented, but urgent functions cannot be executed quickly

Engineering Contradiction:
Improvecollision preventionVSAvoidurgent function execution speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent implements a dynamic priority arbitration mechanism where the access order is not fixed but can change based on urgency. The slave device evaluates the priority levels of waiting master devices and dynamically adjusts the access sequence. When an urgent function is detected, the corresponding master device can be granted immediate access regardless of its position in the registration order. This dynamic adjustment maintains collision prevention while enabling fast execution of urgent functions.

Inventive Principle:
Principle #15Dynamics

3Reliability

If each master has a unique dedicated buffer, then system independence is ensured, but logic size and complexity increase as number of masters increases

Engineering Contradiction:
Improvemaster independenceVSAvoidlogic complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a universal arbitration mechanism where a single slave device with a registration table and priority evaluation logic serves multiple master devices. Instead of requiring separate dedicated buffers for each master, the slave device universally handles access requests from any number of masters through a standardized arbitration process. This multi-functional approach ensures master independence through proper arbitration while keeping the logic size constant regardless of the number of masters, avoiding the complexity increase that would result from individual dedicated buffers for each master.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11025548B2Control device and method of vehicle multi-master module based on ring communication topology based vehicle
Publication Date: 2021.06.01 HYUNDAI MOBIS CO LTD
  • US11025548B2 patent drawing
  • US11025548B2 patent drawing
  • US11025548B2 patent drawing

AI summary

Provided is a collision prevention system of a multi-master including: a plurality of external modules; and an integrated device. The integrated device includes: a plurality of interfaces connected respectively to the plurality of external modules and respectively controlled by corresponding external modules; a plurality of internal modules; a plurality of dedicated buffers connected respectively to the plurality of interfaces and the plurality of internal modules; and a common block connected to the plurality of dedicated buffers and controlled by the plurality of interfaces and the plurality of internal modules. The plurality of dedicated buffers includes a GBU and a plurality of LBUs. The GBU and the plurality of LBUs are connected to two neighboring GBUs and a plurality of LBUs to form a ring communication topology, which transmits ring communication data in one direction. The common block is connected to the ring communication topology through the GBU.