Multi-Master Time Synchronization with Clock Error Correction

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Solution Overview

Problem

Existing time synchronization systems in video transmission systems face challenges in achieving accurate synchronization when master nodes have varying clock accuracy, leading to potential clock jumps or inaccuracies, especially when using independent source clocks like the black burst (BB) signal, which may differ in frequency from global source clocks.

Innovation Solution

A time synchronization system with multiple master nodes, where a primary master node synchronizes with an external synchronization signal and corrects secondary master nodes' clocks, ensuring all nodes maintain accurate synchronization by adjusting their local clocks based on the primary's clock and the external synchronization signal, reducing downtime and ensuring continuous operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a master node uses an independent source clock (e.g., black burst signal) for time synchronization, then the node can operate independently, but the clock accuracy deteriorates because the independent source clock may have frequency differences from the global source clock

Engineering Contradiction:
Improveindependent operation capabilityVSAvoidclock accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent introduces a secondary master node as an intermediary between the primary master node and other slave nodes. The secondary master node receives time information from both the primary master node and its own independent source clock, processes this information to determine the most accurate time, and then distributes it to slave nodes. This intermediary approach allows the system to maintain both independent operation capability and high clock accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent dynamically changes the operational parameters of master nodes based on their clock accuracy. When a master node's clock accuracy deteriorates beyond a threshold, the system transitions that node from primary to secondary status or adjusts its weighting in time synchronization calculations. This parameter change ensures that the system continuously optimizes for accuracy while maintaining operational flexibility.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a slave node changes its best master clock (BMC) to one with higher priority, then the synchronization priority improves, but clock jumps or temporary inaccuracies occur due to differences in local clock times before and after the change

Engineering Contradiction:
Improvesynchronization priorityVSAvoidclock stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent performs preliminary time adjustment when a slave node switches BMC. Before the slave node switches to a new master clock, the system calculates the time difference between the current and new master clocks, and applies a preliminary correction to the slave node's local clock. This preliminary action prevents clock jumps and maintains stability during the BMC transition.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms that continuously monitor clock synchronization status and automatically adjust timing parameters. When a BMC change is detected, the feedback system measures the resulting time deviation and applies corrective adjustments to maintain clock stability, ensuring that priority improvements do not compromise overall synchronization stability.

Inventive Principle:
Principle #23Feedback

3Reliability

If multiple master nodes are used to achieve redundancy, then fault tolerance improves, but the system complexity increases due to the need to manage varying clock accuracies and synchronization protocols

Engineering Contradiction:
Improvefault toleranceVSAvoidsynchronization system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent assigns different functional qualities to different master nodes based on their capabilities and clock accuracy. Primary master nodes handle critical time distribution functions with high accuracy requirements, while secondary master nodes handle less critical functions or serve as backups. This local quality differentiation reduces overall system complexity by allowing each node to operate within its optimized capability range while maintaining redundancy.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP3291467B1Time synchronization system
Publication Date: 2020.05.20 MEDIA GLOBAL LINKSKK
  • EP3291467B1 patent drawingFigure 1A~1B
  • EP3291467B1 patent drawingFigure 2
  • EP3291467B1 patent drawingFigure 3

AI summary

A time synchronization system includes master nodes (1A, 1B and 1N) and slave nodes (2A, 2B and 2N) configured to correct a local slave clock by synchronizing time with time in a local master clock. A first master node corrects a first local master clock at predetermined periodic intervals by synchronizing with a timing synchronization signal from a source clock node having a source clock. If a second local master clock has a greater error from the source clock than the error in the first local master clock, the second master node performs first correction by synchronizing time with time in the first local master clock and performs second correction by synchronizing with the timing synchronization signal from the source clock node on condition that an error in the second local master clock is within a predetermined range after the first correction has been performed.