Multi-metal Gate Semiconductor Device Triple Diameter Metal Opening
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Solution Overview
Problem
The reduction in size of semiconductor devices poses challenges in maintaining electrical properties, particularly due to potential damages from oxide loss during subsequent procedures, which can affect the metal gate and other components.
Innovation Solution
A sacrificial layer is introduced before silicide formation to prevent damage to the metal gate, with the method involving the formation of a substrate with metal gates separated by insulation, followed by patterning of the sacrificial and insulation layers to create openings for silicide formation and conductive contact creation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the feature size of semiconductor device is reduced, then the density and cost per integrated circuit unit are improved, but the electrical properties deteriorate due to oxide loss during subsequent procedures
Solution Approach 1:
A sacrificial layer is formed over the metal gate and insulation layers before subsequent processing steps. This sacrificial layer serves as a protective barrier that prevents oxide loss during etching and other subsequent procedures, thereby preserving the electrical properties of the metal gate while enabling continued miniaturization of the device features
2Ease of manufacture
If the feature size is reduced, then the cost per integrated circuit unit is improved, but the metal gate becomes more susceptible to damage from oxide loss
Solution Approach 1:
The sacrificial layer is deposited in advance before the metal gate is exposed to harmful processing conditions. This preliminary protective measure prevents oxide formation and loss during subsequent etching steps, allowing the device to be manufactured at smaller feature sizes without compromising the integrity of the metal gate
Solution Approach 2:
The sacrificial layer acts as an intermediary protective barrier between the metal gate and the harmful etching environment. It absorbs the damage from oxide loss and subsequent processing, protecting the underlying metal gate structure while enabling cost-effective manufacturing at reduced feature sizes
Data Source
AI summary
A method for manufacturing a semiconductor device and a device manufactured using the same are provided. A substrate with plural metal gates formed thereon is provided, wherein the adjacent metal gates are separated by insulation. A sacrificial layer is formed for capping the metal gates and the insulation, and the sacrificial layer and the insulation are patterned to form at least an opening for exposing the substrate. A silicide is formed corresponding to the opening at the substrate, and a conductive contact is formed in the opening. The conductive contact has a top area with a second diameter CD2 for opening the insulation. A patterned dielectric layer, further formed on the metal gates, the insulation and the conductive contact, at least has a first M0 opening with a third diameter CD3 for exposing the conductive contact, wherein CD2>CD3.