Multi-Mode Charge Pump with Adjustable Clock Frequency and Voltage
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Solution Overview
Problem
Charge pumps in radio frequency systems face a trade-off between settling time and output ripple, with existing designs often degrading one performance specification to improve another, leading to non-ideal performance in RF applications.
Innovation Solution
A charge pump configuration that includes a mode control circuit, clock generation circuit, and capacitor charging circuit, allowing operation in multiple modes with adjustable clock signal frequencies and power supply voltages, enabling a digitally configurable trade-off between settling time and output ripple.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the charge pump operates at a fixed frequency and voltage, then the circuit design is simple, but the performance cannot be optimized for different applications
Solution Approach 1:
The charge pump implements dynamic operation by allowing the clock frequency and power supply voltage to be adjusted based on different operating modes. The system can switch between different clock frequencies (e.g., first frequency for fast settling, second frequency for low ripple) and different voltage levels to optimize performance for specific applications, transforming a static circuit into an adaptable one.
Solution Approach 2:
The invention changes key operating parameters including clock frequency and power supply voltage to achieve different performance characteristics. By varying these parameters, the charge pump can be optimized for different applications - for example, using a higher frequency for faster settling time or a lower frequency for reduced output ripple, without requiring complete circuit redesign.
2Loss of time
If the charge pump uses a higher clock frequency, then the settling time is reduced, but the output ripple increases
Solution Approach 1:
The charge pump dynamically adjusts the clock frequency based on the desired performance characteristic. When fast settling is required, the system operates at a higher clock frequency. When low output ripple is the priority, the system switches to a lower clock frequency. This dynamic frequency selection allows the system to optimize between settling time and ripple based on real-time requirements.
Solution Approach 2:
The invention utilizes parameter changes by varying the clock frequency to achieve different performance trade-offs. The system can select between a first clock frequency that provides fast settling and a second clock frequency that provides low output ripple, allowing flexible optimization of the harmful effect based on application needs.
3Productivity
If the charge pump uses a higher power supply voltage, then the charging speed increases, but the power consumption increases
Solution Approach 1:
The charge pump changes the power supply voltage parameter to optimize the trade-off between charging speed and power consumption. The system can operate at a higher voltage when fast charging is required and switch to a lower voltage when power efficiency is the priority, allowing flexible adjustment of this energy-related parameter based on operational requirements.
Data Source
AI summary
Apparatus and methods for multi-mode charge pumps are disclosed herein. In certain configurations, a multi-mode charge pump includes an output terminal, a mode control circuit that operates the multi-mode charge pump in a selected mode, a first switched capacitor, a capacitor charging circuit, and a plurality of switches. The capacitor charging circuit connects a first end of the first switched capacitor to a charging voltage in a first phase of a clock signal, and connects the first end of the first switched capacitor to a reference voltage in a second phase of the clock signal. The charging voltage has a voltage level that changes based on the selected mode. The plurality of switches connect a second end of the first switched capacitor to the reference voltage in the first phase, and connect the second end of the first switched capacitor to the output terminal in the second phase.