Multi-Module Server Architecture with Hierarchical BMC Management
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Solution Overview
Problem
Existing multi-module server architectures face limitations in managing a large number of interconnected modules due to the limitations of the IPMI standard, particularly in terms of sensor capacity and data logistics bus performance and flexibility, which hinders interoperability and compatibility with standard management interfaces.
Innovation Solution
A multi-module server architecture that utilizes a network of modules interconnected via an XQPI network and a private Ethernet protocol encapsulating the IPMB standard, with a BMC component capable of central management and data exchange, and a programmable gate array for clock signal distribution and error recording, ensuring software compatibility with standard management interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of modules is increased to improve server capacity and performance, then the sensor count increases proportionally, but the IPMI standard is limited to a predefined number of authorized sensors
Solution Approach 1:
The patent introduces an intermediary translation layer that maps multiple physical sensors to a limited number of IPMI sensor addresses. The management firmware acts as a mediator between the physical sensor network and the IPMI standard interface, allowing multiple sensors to be monitored while maintaining compatibility with the predefined IPMI sensor address space.
Solution Approach 2:
The management firmware provides universal monitoring capability by implementing a translation mechanism that allows a single IPMI sensor interface to represent multiple physical sensors. This multi-functional approach enables the system to monitor an unlimited number of sensors through the standardized IPMI interface, making the management system adaptable to any number of modules.
2Adaptability or versatility
If data logistics buses are extended to connect more modules, then the interconnection capability is improved, but the bus performance and latency increase
Solution Approach 1:
The patent segments the management network into hierarchical levels with local management controllers handling nearby modules and higher-level controllers managing broader coordination. This segmentation allows data logistics buses to remain short and high-performance within each segment while achieving system-wide interconnection through multiple segments, preventing performance degradation from single long bus extensions.
Solution Approach 2:
The patent transitions from a single-dimension linear bus extension to a multi-dimensional hierarchical network structure. By organizing management controllers in layers and using standardized protocols for inter-layer communication, the system achieves scalable interconnection without the performance penalties of extended single buses, effectively adding dimensional organization to the interconnection architecture.
3Adaptability or versatility
If proprietary administration standards are used to manage multi-module servers, then management flexibility is improved, but interoperability and compatibility with existing data management systems are reduced
Solution Approach 1:
The management firmware serves as an intermediary that translates between proprietary management mechanisms and standardized IPMI interfaces. This allows the system to implement flexible proprietary management strategies internally while presenting a standard IPMI interface to external management systems, thereby maintaining both management flexibility and interoperability through the translation layer.
Solution Approach 2:
The patent inverts the traditional approach by implementing proprietary management flexibility at the firmware level while exposing standardized interfaces outwardly. Instead of requiring external systems to adapt to proprietary standards, the system adapts its internal proprietary mechanisms to conform to external standards, reversing the direction of adaptation to preserve both flexibility and compatibility.
Data Source
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AI summary
Server (100) comprising a plurality of modules (1-8), each module comprising - a communication element (16, 26); - a plurality of CPU processors (10, 11, 20, 21); - a system-on-a-chip (SOC) (12, 22) running firmware; - a field-programmable gate array (FPGA) (13, 23); the modules being interconnected by - an interconnection (27) between each communication element; - an interconnection (28) between each system-on-a-chip (SOC); the running firmware realizing two software components - a satellite controller component for managing the system (SMC) (15, 25); - a baseboard controller component for managing the baseboard (BMC) (14, 24).