Multi-Node Latch Topology for Soft Error Resilience
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Solution Overview
Problem
Storage devices, such as latches, are prone to soft errors caused by radiation or particle strikes, leading to unintended state changes in stored data bits, which can propagate and cause malfunctions in critical applications like space, automotive, and medical fields.
Innovation Solution
A soft error-resilient latch design that employs redundancy and dependency by storing duplicate and complementary data bits across multiple storage nodes, with multi-dependency stages ensuring state changes occur only when corresponding nodes change simultaneously, thereby mitigating the impact of single-bit errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundancy and dependency are employed to store duplicate and complementary data bits across multiple storage nodes, then the latch becomes resilient to soft errors, but the device complexity increases
Solution Approach 1:
The patent stores duplicate copies of data bits across multiple storage nodes (e.g., nodes 106a-106d) and their complementary nodes (106c-106d). Each data bit is replicated in multiple locations, and when a soft error occurs in one node, the correct value can be recovered from the other duplicate nodes or complementary nodes, thereby achieving soft error resilience through copying
Solution Approach 2:
The latch is divided into multiple independent storage nodes (106a-106d) with multi-dependency stages (108a-108d, 110a-110d) that create dependency relationships between nodes. This segmentation allows the system to isolate and recover from errors in individual nodes while maintaining overall functionality, as each node's state depends on multiple other nodes through the multi-dependency stages
2Reliability
If multiple storage nodes store duplicate and complementary data bits, then the latch can tolerate one-bit errors, but the area occupied by the latch increases
Solution Approach 1:
Data bits are replicated across multiple storage nodes (106a-106d) with complementary nodes (106c-106d) storing inverted values. This copying approach enables error tolerance because a single-bit error can be detected and corrected by comparing values across the duplicate and complementary nodes, achieving reliability without requiring more complex error correction circuits that would occupy additional area
3Reliability
If multi-dependency stages link storage nodes to two or more other storage nodes, then state changes are prevented unless multiple nodes change simultaneously, but the device complexity increases
Solution Approach 1:
The latch employs multiple independent multi-dependency stages (108a-108d, 110a-110d) that create a network of dependency relationships between storage nodes. Each stage independently enforces dependency rules, and the segmented architecture allows the system to tolerate errors in individual stages or nodes while maintaining overall state integrity through the distributed dependency structure
Solution Approach 2:
The multi-dependency stages act as intermediary components between storage nodes, mediating state changes by requiring simultaneous changes in multiple dependent nodes. This intermediary mechanism prevents spurious state changes from single-bit errors while allowing legitimate state transitions when multiple nodes change together, achieving reliable state control through the mediating dependency stages
Data Source
AI summary
A latch is provided. The latch includes a plurality of storage nodes including a plurality of data storage nodes configured to store a data bit having one of two states and a plurality of complementary data storage nodes configured to store a complement of the data bit. The latch includes a plurality of supply voltage multi-dependency stages respectively corresponding to the plurality of storage nodes. Each supply voltage multi-dependency stage has an output coupled to a storage node and at least two control inputs respectively coupled to at least two other storage nodes of the plurality of storage nodes. The supply voltage multi-dependency stage is configured to cause a state of the data bit stored in the storage node to change from a first state to a second state in response a change in both states of two data bits respectively stored in the at least two other storage nodes.