Multi-orientation SOI substrate with (100) and (110) regions
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Solution Overview
Problem
Current semiconductor technologies face challenges in creating multi-orientation semiconductor-on-insulator (SOI) substrates with both n-type and p-type field effect transistors on the same substrate, as they typically use single crystal orientation wafers, limiting mobility and performance, and existing methods are costly and complex.
Innovation Solution
A method to form a multi-orientation SOI substrate by creating surface semiconductor regions of different crystal orientations directly on an insulator layer, using techniques like wafer bonding, selective etching, and defect-inducing implantation to remove the semiconductor base layer, allowing for both (100) and (110) oriented regions on a common insulator layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single crystal orientation wafer is used, then the fabrication process is simple, but the mobility and performance are limited
Solution Approach 1:
The substrate is divided into multiple regions with different crystal orientations ((100) and (110) regions) on the same wafer, allowing each region to be optimized for specific device types (nFETs on (100), pFETs on (110)) while maintaining a unified fabrication process
Solution Approach 2:
Different regions of the substrate are assigned different crystal orientations to provide locally optimized properties: (100) orientation for high electron mobility in nFET regions, and (110) orientation for high hole mobility in pFET regions
2Adaptability or versatility
If existing multi-orientation substrate methods are used, then both orientations are achieved, but the fabrication process is costly and complex
Solution Approach 1:
Crystal orientation conversion is performed during the bulk substrate preparation stage before wafer bonding and SOI structure formation, allowing the multi-orientation pattern to be established early in the process when materials are more accessible and modifications are easier to implement
Solution Approach 2:
A buffer layer is introduced as an intermediary between the substrate and the SOI structure, facilitating the integration of multi-orientation regions and enabling simpler processing by decoupling the orientation conversion step from the final device fabrication
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a complete SOI substrate with reduced junction capacitance and improved performance for device structures, such as FETs, by enabling both nFETs and pFETs on the same substrate, while simplifying the fabrication process and reducing costs.
Implementation Method 1
the insulator layer comprises a thermally grown insulator material selected from the group consisting of silicon oxide, silicon nitride, and silicon oxynitride
Implementation Method 2
defect-inducing implantation to remove the semiconductor base layer
Data Source
AI summary
The present invention relates to semiconductor-on-insulator (SOI) substrate structures that contain surface semiconductor regions of different crystal orientations located directly on an insulator layer. The present invention also relates to methods for fabricating such SOI substrate structures, by growing an insulator layer directly on a multi-orientation bulk semiconductor substrate that comprises surface semiconductor regions of different crystal orientations located directly on a semiconductor base layer, and removing the semiconductor base layer, thereby forming a multi-orientation SOI substrate structure that comprises surface semiconductor regions of different crystal orientations located directly on the insulator layer.