Multi-Output Phase Detector for Predictable PLL Bandwidth
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Solution Overview
Problem
Phase-locked loop (PLL) devices with binary phase detectors face limitations due to non-linearity, which restrict their ability to handle high data-rate frequency shift keying (FSK) modulation and result in unpredictable bandwidth, as the instantaneous gain depends on the instantaneous phase error.
Innovation Solution
A multi-output phase detector that provides a multi-bit binary representation of the phase difference, including both the sign and magnitude, is used to control a digitally controlled oscillator, allowing for more precise frequency adjustments and improved linearity in PLL performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a binary phase detector is used in a PLL device, then the device structure remains simple, but the response capabilities are limited and cannot handle high data-rate frequency shift keying modulation
Solution Approach 1:
The phase detector is segmented into multiple binary phase detectors, each handling a specific bit position of the multi-bit output. Each detector compares a delayed version of the feedback signal with the reference signal at different delay intervals, enabling the system to detect both sign and magnitude of phase differences through parallel binary comparisons, thereby expanding FSK modulation capabilities without requiring a completely new detector architecture
Solution Approach 2:
The invention transitions from a single-dimensional binary output (sign only) to a multi-dimensional output by introducing multiple delay elements and parallel binary detectors. This creates additional dimensions in the detection space, where each delay interval corresponds to a specific bit position, enabling multi-bit representation of phase differences and significantly improving adaptability for high data-rate FSK modulation
2Reliability
If a binary phase detector is used, then the device complexity is low, but the bandwidth of the PLL becomes unpredictable because the instantaneous gain depends on the instantaneous phase error
Solution Approach 1:
The system performs preliminary actions by introducing multiple predetermined delay intervals before the phase comparison occurs. These delay elements pre-position the feedback signal at different time offsets, allowing the multi-bit phase detector to capture magnitude information in advance. This preliminary structuring of the detection process eliminates the non-linearity issue and ensures constant instantaneous gain, making bandwidth predictable while maintaining reasonable device complexity
Solution Approach 2:
The invention changes the output parameters of the phase detector from a single binary value to a multi-bit representation. By introducing multiple delay intervals and corresponding binary detectors, the system transforms the phase error information into multiple discrete parameter levels, each representing a specific magnitude range. This parameter expansion ensures constant instantaneous gain across different operating conditions, making PLL bandwidth predictable
3Measurement precision
If a binary phase detector is used, then the manufacturing is simple, but the linearity of phase detection is poor because the response depends on the sign of the error rather than the actual phase error
Solution Approach 1:
The phase detection function is segmented into multiple binary detectors, each responsible for a specific bit position. Each detector operates on a delayed version of the feedback signal, and their combined outputs form a multi-bit representation that linearly reflects the actual phase error magnitude. This segmentation approach improves measurement precision while keeping individual detector units simple and manufacturable
Solution Approach 2:
Delay elements serve as intermediaries between the feedback signal and the binary phase detectors. These intermediaries introduce controlled time shifts that encode magnitude information into the timing relationships between signals. By using delay elements as mediators, the system achieves linear phase detection without requiring complex detector circuits, maintaining ease of manufacturing while improving measurement precision
Data Source
AI summary
Representative implementations of devices and techniques provide a multi-bit binary representation of a phase difference between two signals. The multi-bit binary representation may include information regarding a sign of the phase difference and a magnitude of the phase difference.