Multi-Output Power Supply Parallel Switch On-Voltage Control
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Solution Overview
Problem
Conventional multi-output power supply apparatuses face inefficiencies due to high on-voltage issues in step-down power supply circuits, especially when input voltage is low, leading to insufficient output supply, and breakdown voltage concerns when input voltage is high.
Innovation Solution
A multi-output power supply apparatus with a step-up power supply circuit and a step-down or inversion power supply circuit featuring a parallel configuration of PMOS and NMOS transistors, where the first switch element is turned on by a lower control terminal potential and the second by a higher potential, with the second switch element's gate power supply sourced from the first output voltage, stabilizing on-resistance and enabling efficient operation across a wide input voltage range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a PMOS transistor is used as the main switch in the step-down power supply circuit, then the circuit can operate with simple configuration, but the on-voltage increases when input voltage is low, resulting in insufficient output supply
Solution Approach 1:
The patent combines PMOS and NMOS transistors in a parallel configuration to form a composite switch. The PMOS transistor (first switch element) and NMOS transistor (second switch element) work together, with the PMOS handling low input voltage conditions and the NMOS handling high input voltage conditions, thereby achieving low on-voltage across the entire input voltage range while maintaining simple circuit configuration.
Solution Approach 2:
The patent changes the control voltage parameter dynamically by using a step-up power supply circuit to generate a boosted gate voltage for the NMOS transistor when input voltage is high. This parameter change allows the NMOS to operate with appropriate gate drive voltage only when needed, reducing on-voltage at high input conditions while maintaining simple circuit structure.
2Reliability
If an NMOS transistor is used as the main switch in the step-down power supply circuit, then the on-voltage is reduced, but the gate power supply voltage may exceed breakdown voltage when input voltage is high
Solution Approach 1:
The patent introduces a step-up power supply circuit as an intermediary component that conditionally generates the gate power supply voltage for the NMOS transistor. This intermediary circuit monitors input voltage conditions and only provides the boosted gate voltage when input voltage exceeds a threshold, preventing breakdown voltage exceedance while maintaining low on-voltage benefits when needed.
Solution Approach 2:
The patent implements dynamic control of the NMOS gate voltage by using a controllable step-up power supply circuit that adjusts its operation based on input voltage conditions. The circuit dynamically switches between providing boosted gate voltage (when input voltage is high) and not providing gate voltage (when input voltage is low), optimizing performance across different operating conditions.
3Object-affected harmful factors
If a step-up converter is added to generate gate power supply voltage, then breakdown voltage exceedance is prevented, but device complexity increases
Solution Approach 1:
The patent designs the step-up power supply circuit to serve multiple functions: it generates gate power supply voltage for the NMOS transistor, provides voltage boosting for high input voltage conditions, and can potentially serve as part of the overall power management system. This multi-functionality reduces the need for separate dedicated circuits, thereby minimizing the increase in device complexity.
4Device complexity
If the input voltage is used to drive the gate of the main switch, then the circuit operates simply, but the on-resistance varies significantly with input voltage
Solution Approach 1:
The patent changes the gate drive voltage parameter from direct input voltage to a conditionally boosted voltage generated by the step-up power supply circuit. This parameter change stabilizes the on-resistance by ensuring the NMOS transistor receives appropriate gate drive voltage across different input voltage conditions, maintaining consistent performance while keeping circuit operation simple through automatic control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces on-voltage in the step-down power supply circuit across a wide input range, ensuring efficient operation and preventing breakdown voltage exceedance by stabilizing the gate power supply voltage and adjusting on-resistance to maintain consistent performance.
Implementation Method 1
a main switch 12 made of an NMOS transistor connected to the other end of the inductor 11... Turning off the main switch 12 allows current to flow from the inductor 11 via the diode 13 to charge the output capacitor 14
Implementation Method 2
a diode 13 and an output capacitor 14 which rectify and smooth the voltage of the main switch 12
Implementation Method 3
a diode 13 and an output capacitor 14 which rectify and smooth the voltage of the main switch 12
Data Source
AI summary
The present invention provides an efficient multi-output power supply apparatus that enables a reduction in the on voltage of a main switch in a step-down power supply circuit or the like over a wide input range from a low input to a high input. The power supply apparatus includes a first power supply circuit that increases an input voltage from an input power source to output a first output voltage Vo1, and a second power supply circuit that outputs a second output voltage Vo2 obtained from the input voltage via a main switch circuit connected to the input power source. The main switch circuit having a first switch element that is a PMOS transistor and a second switch element that is an NMOS transistor connected to each other in parallel. The first output voltage Vo1 is applied to a gate of the second switch element.