Multi-Parity Codeword Decoding for Non-Uniform Memory Errors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The use of interleaving in concatenated coding for error control in memory systems is limited by complex circuitry requirements, power consumption, and large die area, which restricts the implementation and efficiency of error correction, especially in non-uniform error distributions.

Innovation Solution

The implementation of interleaver-free parallel concatenated coding that employs joint-iterative decoding and error estimation to select decoders and match error probabilities with error correction capabilities, using adjustable generator and parity-check matrices based on error density profiles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If interleaving is used in concatenated coding for error control, then error correction capability is improved, but device complexity and die area increase significantly

Engineering Contradiction:
Improveerror correction capabilityVSAvoidcircuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and removes the interleaver component from the concatenated coding system. By taking out the interleaving function, the system eliminates the complex circuitry and large die area requirements while maintaining error correction capability through an alternative approach using multiple parallel encoders without interleaving.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent divides the coding system into multiple parallel encoders that operate independently on different segments of data. This segmentation allows the system to achieve error correction through parallel processing without requiring the interleaving structure, thereby reducing device complexity while maintaining reliability.

Inventive Principle:
Principle #1Segmentation

2Reliability

If interleaving is used in concatenated coding, then error normalization is achieved, but power consumption increases

Engineering Contradiction:
Improveerror distribution normalizationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent removes the interleaver component that causes high power consumption. By extracting this element and replacing it with parallel encoders operating on data segments, the system achieves error handling capability without the power-intensive interleaving operation.

Inventive Principle:
Principle #2Taking out (Extraction)

3Quantity of substance

If multi-bit symbol interleaving is used across multiple ports, then storage density is improved, but synchronization complexity increases

Engineering Contradiction:
Improvestorage densityVSAvoidsynchronization complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent segments the data processing into parallel encoders that handle different data portions independently. This segmentation approach maintains storage density by processing multiple data streams simultaneously while avoiding the synchronization complexity of traditional interleaving across multiple ports.

Inventive Principle:
Principle #1Segmentation

4Reliability

If interleaving is used, then clustered errors are de-clustered, but the ability to feed forward corrected information is restricted

Engineering Contradiction:
Improveerror distribution uniformityVSAvoidinformation feed-forward capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent divides the coding into parallel segments processed by independent encoders. This segmentation enables corrected information from one decoder to be fed forward to assist other decoders, improving adaptability while maintaining error distribution uniformity through the parallel structure.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8924815B2Systems, methods and devices for decoding codewords having multiple parity segments
Publication Date: 2014.12.30 SANDISK TECHNOLOGIES LLC
  • US8924815B2 patent drawing
  • US8924815B2 patent drawing
  • US8924815B2 patent drawing

AI summary

An error control decoding system decodes a codeword that includes a data word and two or more parity segments. The system includes a first decoder to decode the codeword by utilizing one or more first parity segments and the data word included in the codeword, and a second decoder to decode the codeword by utilizing one or more second parity segments and the data word included in the codeword, wherein the one or more first parity segments are different from the one or more second parity segments. An error estimation module estimates the number of errors in the codeword, and a controller selects which of the first decoder and second decoder to start decoding the codeword, wherein the selection is based on the estimate of the number of errors in the codeword provided by the error estimation module.