Multi-path Message Distribution with Forward Error Correction

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Solution Overview

Problem

Existing network communication technologies fail to provide reliable, high-throughput data transmission for high-data rate network flows in real-time, especially when high-latency transmission links are involved, as they rely on retransmission and are not adaptable to support single or limited high-data rate flows.

Innovation Solution

The implementation of a High-Performance Computing (HPC) environment with Forward Error Correction (FEC) across multiple transmission paths, utilizing heterogeneous compute environments and advanced processing technologies like GPUs and FPGAs, to ensure data integrity and recovery without retransmission, along with optional data scrambling and obfuscation for security and redundancy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If retransmission is used for lost packets, then data reliability is improved, but transmission time increases due to high-latency paths

Engineering Contradiction:
Improvedata reliabilityVSAvoidtransmission time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Forward error correction codes are added to data packets in advance before transmission, enabling the receiver to reconstruct lost packets without requiring retransmission. This preliminary encoding action eliminates the time-consuming retransmission process while maintaining data reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Error correction codes act as an intermediary mechanism between sender and receiver, allowing the receiver to independently recover lost data through decoding operations without needing to communicate with the sender for retransmission, thus reducing latency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If Forward Error Correction is applied to high-data rate flows, then data integrity is improved, but computational complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces traditional software-based error correction processing with hardware-accelerated processing using FPGAs and GPUs. This substitution of mechanical/computational systems provides the necessary compute power for FEC operations at extremely high data rates without proportionally increasing complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The system dynamically adjusts error correction parameters and coding rates based on network conditions and data rate requirements, optimizing the balance between data integrity and computational complexity for different transmission scenarios.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If multiple transmission paths are used for high throughput, then data rate is improved, but difficulty in recovering lost packets increases

Engineering Contradiction:
Improvedata rateVSAvoidpacket recovery difficulty
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The data stream is segmented into multiple parallel transmission paths, each carrying portions of the encoded data. This segmentation enables independent transmission over diverse paths while maintaining the ability to reconstruct the complete data set at the receiver through systematic error correction decoding.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11196664B2Multi-path message distribution and message reassembly for large data flow using forward error correction with high-performance computing (HPC)
Publication Date: 2021.12.07 APOTHYM TECH GRP LLC
  • US11196664B2 patent drawing
  • US11196664B2 patent drawing
  • US11196664B2 patent drawing

AI summary

A reliable high-throughput data transmission may be accomplished using a multi-path message distribution and a message reassembly with a forward error correction protection. An incoming flow of data from a source is received at an input parser. The incoming flow of data is divided into a plurality of packets by the input parser. The plurality of the packets is encoded with a FEC and transmitted over a network with a plurality of transmission links. The transmitted plurality of FEC encoded packets are decoded. The decoded plurality of packets is merged to an outgoing flow of data with an output multiplexor and the outgoing flow of data is sent to a destination.