Multi-Phase Clock Switching with Stepwise Glitch-Free Transitions

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Solution Overview

Problem

Direct switching between multiple phase clocks can cause glitches and abrupt timing changes, which are problematic in systems requiring calibration and maximum timing margin, such as in memory chips.

Innovation Solution

The method involves step-by-step switching between adjacent phases using D-type flip-flops and logic gates, with a switch controller ensuring glitch-free transitions by employing a circular shift register to manage the phase changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If direct switching between clock phases is implemented, then switching speed is improved, but glitches and timing instability occur

Engineering Contradiction:
Improveswitching speedVSAvoidtiming stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The switching process is segmented into multiple intermediate steps rather than a single direct transition. The method divides the phase switching into a sequence of controlled transitions through intermediate phases, where each transition is managed by individual switch controllers that activate switches sequentially. This segmentation allows the system to achieve phase switching while maintaining timing stability and avoiding glitches that would occur with direct switching.

Inventive Principle:
Principle #1Segmentation

2Reliability

If step-by-step switching between adjacent phases is implemented, then timing stability is improved, but switching time increases

Engineering Contradiction:
Improvetiming stabilityVSAvoidswitching time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The switch controllers are pre-configured with the sequence of phase transitions before switching begins. The system prepares the switching sequence in advance, and the controllers execute the pre-planned transitions efficiently. This preliminary preparation allows the multi-step switching process to proceed rapidly without unnecessary delays, balancing timing stability with acceptable switching time.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If multiple switches and controllers are used for phase switching, then glitch-free operation is achieved, but device complexity increases

Engineering Contradiction:
Improveglitch-free operationVSAvoidswitching circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The switch controllers are designed as multi-functional units that can manage multiple phases and perform multiple operations. Each controller handles phase selection, switch activation, and timing coordination for its assigned phases. This universal design reduces the overall system complexity by consolidating control functions into versatile controllers rather than requiring dedicated simple switches for each phase transition.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8680910B1Method and apparatus for glitch-free switching of multiple phase clock
Publication Date: 2014.03.25 RENESAS ELECTRONICS AMERICA INC
  • US8680910B1 patent drawing
  • US8680910B1 patent drawing
  • US8680910B1 patent drawing

AI summary

A method and apparatus for glitch-free switching of multiple phase clock have been disclosed where switching from one phase to another phase is done step-by-step to avoid generating a glitch.