Multi-Phase PLL Frequency Detection for Faster VCO Locking

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Solution Overview

Problem

Voltage-controlled oscillators (VCOs) in phase-locked loops (PLLs) often experience long frequency locking times due to the proximity of reference and feedback signals, necessitating an improvement in digital PLLs for faster and more precise frequency synchronization.

Innovation Solution

The implementation of a phase-lock loop with multiple frequency counters and a frequency detector that compares the output signal of the VCO with a reference signal within each reference clock period, using flip-flops, counters, and mathematical operations to generate a control signal that adjusts the VCO output to match the desired frequency band, thereby reducing frequency locking time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the reference signal and feedback signal are kept close to each other for stable frequency comparison, then the phase detection accuracy is improved, but the frequency locking time increases significantly

Engineering Contradiction:
Improvephase detection accuracyVSAvoidfrequency locking time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The frequency detection process is segmented into multiple discrete frequency bands. Instead of comparing signals continuously across the entire frequency range, the system divides the frequency spectrum into distinct bands and uses separate counters for each band. This segmentation allows the system to quickly identify which band contains the target frequency and then perform precise phase detection only within that narrowed range, thereby reducing overall locking time while maintaining accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary frequency band identification before executing the main phase-locked loop locking process. By using frequency counters to pre-determine which frequency band contains the reference signal, the system prepares the lock-in amplifier and phase detector in advance to operate only in the relevant band. This preliminary action eliminates the need for the entire PLL to sweep through all frequency bands, significantly reducing frequency locking time.

Inventive Principle:
Principle #10Preliminary action

2Speed

If multiple frequency counters are used to reduce frequency locking time, then the frequency detection speed is improved, but the power consumption and device complexity increase

Engineering Contradiction:
Improvefrequency detection speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The system dynamically activates and deactivates frequency counters based on operational requirements. During the initial frequency acquisition phase, multiple counters are activated to quickly identify the reference frequency band. Once the correct band is identified, the system deactivates unnecessary counters and activates only the specific counter needed for maintaining lock in that band. This dynamic control of counter activation reduces power consumption while preserving fast frequency detection capabilities when needed.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If multiple frequency counters are activated simultaneously to increase resolution, then the frequency measurement precision is improved, but the power consumption increases

Engineering Contradiction:
Improvefrequency measurement precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The system uses a hierarchical measurement approach where a coarse frequency counter performs preliminary measurement to identify the general frequency band. Only after this preliminary action identifies the relevant band does the system activate the higher-resolution counter for that specific band. This preliminary action eliminates the need to keep all high-resolution counters active simultaneously, reducing power consumption while maintaining high measurement precision when required.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8704563B2Phase-lock loop
Publication Date: 2014.04.22 INFINEON TECHNOLOGIES AG
  • US8704563B2 patent drawing
  • US8704563B2 patent drawing
  • US8704563B2 patent drawing

AI summary

In one implementation an output signal of an oscillator is varied to be within a desired frequency band with respect to a reference signal, the output signal having a plurality of phases. The implementation may include comparing the output signal with the reference signal, counting falling edges about each phase of the number of phases in a predetermined time period and summing to define a count output; comparing the count output with a product of the number of phases of the output signal and the factor to define a comparison, generating a control signal based upon the comparison, and inputting the control signal to the oscillator to alter the output signal thereof.