Multi-Pitch Ball Land Semiconductor Package Design
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Solution Overview
Problem
Current package-on-package (POP) technologies face limitations in accommodating chips of various sizes, particularly in achieving a compact and efficient semiconductor package that minimizes mold flash invasion and allows for adjustable pitch configurations.
Innovation Solution
A semiconductor package design featuring a printed circuit board with first and second ball lands arranged at different pitches, where the second pitch is greater than the first, and an epoxy molding compound with protrusions to minimize mold flash invasion, enabling flexible sizing to accommodate multiple chip sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional POP technology with uniform pitch ball lands is used, then the package structure is simple and easy to manufacture, but it cannot accommodate chips of various sizes and the mold flash easily invades the ball lands
Solution Approach 1:
The ball lands are segmented into two distinct pitch configurations: first pitch ball lands (closer to the chip) and second pitch ball lands (farther from the chip). This segmentation allows different regions of the package to serve different functions - the first pitch areas accommodate smaller chips while the second pitch areas provide space for larger chips and prevent mold flash invasion.
Solution Approach 2:
Different pitch values are assigned to different locations based on local requirements. The first pitch (smaller) is applied near the chip region where space is constrained, while the second pitch (larger) is applied in outer regions where mold flash prevention and chip size accommodation are priorities. This local differentiation resolves the contradiction between compactness and adaptability.
2Volume of moving object
If the pitch between ball lands is reduced to minimize package size, then the package becomes more compact, but the mold flash invasion risk increases
Solution Approach 1:
The ball land array is divided into zones with different pitch values. The first pitch ball lands (smaller pitch) are positioned in regions less susceptible to mold flash, while the second pitch ball lands (larger pitch) are positioned in regions more vulnerable to mold flash invasion. This spatial segmentation allows compact packaging in safe zones while maintaining protection in vulnerable zones.
Solution Approach 2:
The pitch value is optimized locally based on the vulnerability to mold flash. In regions where mold flash is less likely to invade, smaller pitch is used to reduce package size. In regions where mold flash is more likely to invade, larger pitch is used to create buffer zones. This local optimization resolves the contradiction between compactness and mold flash resistance.
3Object-affected harmful factors
If a larger pitch is used for all ball lands to prevent mold flash invasion, then mold flash resistance is improved, but the package size increases and smaller chips cannot be efficiently accommodated
Solution Approach 1:
The uniform pitch structure is segmented into non-uniform pitch zones. The first pitch (larger) is applied in outer regions to prevent mold flash invasion, while the second pitch (smaller) is applied in inner regions to accommodate smaller chips efficiently. This segmentation allows the package to achieve both mold flash resistance and compact size by optimizing pitch locally.
Solution Approach 2:
The pitch value is differentiated by location to balance mold flash protection and chip accommodation. In outer regions vulnerable to mold flash, larger pitch provides protection. In inner regions where space is constrained and smaller chips are mounted, smaller pitch optimizes space utilization. This local differentiation resolves the contradiction between mold flash resistance and package compactness.
Data Source
AI summary
A semiconductor device having a printed circuit board and a semiconductor chip. The printed circuit board includes a chip region, a plurality of first ball lands adjacent to the chip region, and at least one second ball land adjacent to the first ball lands. The semiconductor chip is mounted on the chip region. The first ball lands are arranged to have a first pitch. One of the first ball lands which is nearest to the second ball land, and the second ball land have a second pitch greater than the first pitch.