Multi-Pitch Fin Etching to Equalize Nested and Isolated Fin Widths
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Solution Overview
Problem
As microprocessors become faster and smaller, maintaining uniform widths and rectangular cross-sections of high aspect ratio fins across substrates becomes increasingly difficult due to micro loading effects, which cause differences in etching rates and metrics between nested and isolated fins, leading to inconsistent performance in fin-based transistor devices.
Innovation Solution
The use of multiple substrate etching processes with specific etching chemistries and gas ratios, such as hydrogen to oxygen, and varying process gas flow rates to control lateral etch rates and passivation, ensures uniform fin widths across nested and isolated fins, employing a hard mask patterning process and breakthrough etching to equalize widths and maintain consistent metrics like threshold voltage and leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single etching process is used to form both nested fins and isolated fins, then the process is simple and fast, but the micro loading effect causes different etching rates and fin widths between nested and isolated fins
Solution Approach 1:
The patent divides the etching process into two separate sequential etching processes: a first etching process that forms initial fin structures, and a second etching process that adjusts and equalizes the widths of nested and isolated fins. This segmentation allows each process to be optimized for its specific function, resolving the contradiction between process efficiency and fin width uniformity.
Solution Approach 2:
The patent changes the etching parameters (such as gas composition, pressure, power, and chemistry) between the first and second etching processes. The second process uses modified parameters to provide differential lateral etching rates that compensate for the micro loading effects observed in the first process, thereby achieving uniform fin widths across different fin types.
2Adaptability or versatility
If the pitch between fin based structures is non-uniform, then design flexibility is improved, but micro loading effects become more significant and cause different metrics between nested and isolated fins
Solution Approach 1:
The patent applies local quality by making the second etching process selectively affect nested fins versus isolated fins through differential lateral etching. The process parameters are tuned so that the etching rate varies locally depending on the fin configuration, allowing compensation for micro loading effects while maintaining the ability to support non-uniform pitch designs.
3Manufacturing precision
If multiple substrate etching processes are used to equalize fin widths, then fin width uniformity is improved, but the process complexity increases
Solution Approach 1:
The patent segments the etching process into two distinct processes with different parameter sets, where the first process forms the basic fin structure and the second process performs width equalization. This segmentation resolves the contradiction by allowing each process to be independently optimized and controlled, achieving uniform fin widths while managing process complexity through systematic division of functions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the production of high aspect ratio fins with uniform widths and rectangular cross-sections, enabling the use of multi-fin devices with consistent performance and metrics, suitable for integrated circuitry, by mitigating micro loading effects and ensuring uniformity in fin-based transistor devices.
Implementation Method 1
Advanced etching technologies for straight, tall and uniform fins across multiple fin pitch structures
Implementation Method 2
specific etching chemistries and gas ratios, such as hydrogen to oxygen, and varying process gas flow rates to control lateral etch rates and passivation
Data Source
AI summary
Embodiments of the invention describe semiconductor devices with high aspect ratio fins and methods for forming such devices. According to an embodiment, the semiconductor device comprises one or more nested fins and one or more isolated fins. According to an embodiment, a patterned hard mask comprising one or more isolated features and one or more nested features is formed with a hard mask etching process. A first substrate etching process forms isolated and nested fins in the substrate by transferring the pattern of the nested and isolated features of the hard mask into the substrate to a first depth. A second etching process is used to etch through the substrate to a second depth. According to embodiments of the invention, the first etching process utilizes an etching chemistry comprising HBr, O2 and CF4, and the second etching process utilizes an etching chemistry comprising Cl2, Ar, and CH4.