Multi-Plane Memory Read Using Parallel Output and Data Compression
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Solution Overview
Problem
Existing memory devices face challenges in optimizing cache read performance, particularly in managing and outputting hard and soft data efficiently from multiple planes within a memory device.
Innovation Solution
The memory device incorporates a first and second plane, a data input/output circuit, and an encoder, where the encoder compresses data read from the second plane while outputting data from the first plane, thereby optimizing the read operation by overlapping data processing and compression tasks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If data is read from multiple planes sequentially, then data output is simple, but read operation time increases
Solution Approach 1:
The encoder compresses soft data from the second plane while the data input/output circuit outputs hard data from the first plane. This preliminary compression action during the data output phase reduces the total read operation time by overlapping compression and output operations, eliminating the sequential bottleneck.
Solution Approach 2:
The system maintains continuous useful action by simultaneously performing data output from the first plane and compression of soft data from the second plane. The encoder and data input/output circuit operate in parallel without interruption, ensuring that compression and output activities continue concurrently to maximize throughput.
2Productivity
If compression is performed sequentially after data reading, then data processing is simple, but read operation time increases
Solution Approach 1:
The encoder performs compression of soft data as a preliminary action during the data output phase. By initiating compression before the data reading from the second plane is complete, the system reduces the total time required for cache read operations and improves productivity.
Solution Approach 2:
The system merges the compression operation with the data output operation by having the encoder compress soft data while the data input/output circuit outputs hard data. This merging of previously separate sequential operations into a parallel combined operation enhances cache read performance.
3Productivity
If hard data and soft data are output separately, then data handling is simple, but overall efficiency decreases
Solution Approach 1:
The encoder compresses soft data as a preliminary action during the data output phase, before the data reading from the second plane is complete. This preliminary compression improves data handling efficiency by reducing the total processing time.
Solution Approach 2:
The system maintains continuous useful action by simultaneously performing data output from the first plane and compression of soft data from the second plane. The encoder and data input/output circuit operate in parallel without interruption, ensuring that compression and output activities continue concurrently to maximize throughput and efficiency.
Data Source
AI summary
The present technology relates to an electronic device. A memory device according to the present technology may include a first plane, a second plane, a data input/output circuit, and an encoder. The data input/output circuit may output data read from the first and second planes. The encoder may compress second data read from the second plane while first data read from the first plane is being output. The data input/output circuit may output the compressed second data after outputting the first data.