Multi-Port BIST Engine for High-Speed Memory Testing
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Solution Overview
Problem
High-speed memory testing in integrated circuits with embedded memories faces challenges due to the inefficiency of externally generated test vectors, which become costly as die area increases and often fail to detect all types of memory defects, necessitating a more effective testing method.
Innovation Solution
A multi-port Built-In Self-Test (BIST) engine is employed, capable of testing embedded memories at full speed while operating at a lower speed than the fastest memory, utilizing a small CPU with a specialized instruction set and on-chip memory for efficient algorithm execution and data logging, allowing for flexible programming and reduced test load overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single BIST engine is designed to operate at the speed of the fastest memory, then all embedded memories can be tested with a single engine, but the die size and cost increase significantly
Solution Approach 1:
The BIST engine is segmented into multiple independent ports (at least two ports), where each port can operate independently at different speeds. This allows the engine to test multiple memories with different speed requirements using a single shared engine structure, avoiding the need to design for the maximum speed of all memories simultaneously.
Solution Approach 2:
The multi-port BIST engine provides universal testing capability across different memory types and speeds. Each port can be configured to match the speed requirements of different embedded memories, allowing a single engine to universally test all memories without requiring speed-matched dedicated engines for each memory.
2Ease of manufacture
If externally generated test vector style tests are used, then testing can be performed, but the test time grows exponentially as embedded memory die area increases
Solution Approach 1:
The BIST engine enables the memory system to test itself autonomously without requiring external test equipment or manually generated test vectors. The engine contains built-in test algorithms and pattern generation capabilities that automatically execute comprehensive memory tests, dramatically reducing test time compared to external vector-based approaches.
Solution Approach 2:
The BIST engine incorporates pre-programmed test algorithms and patterns stored in on-chip memory or generated internally. These test sequences are prepared in advance and automatically executed during the test phase, eliminating the need for time-consuming external vector generation and application.
3Ease of manufacture
If externally generated test vector style tests are used, then testing can be performed, but all possible types of memory defects cannot be detected
Solution Approach 1:
The self-testing capability of the BIST engine allows execution of comprehensive test algorithms that systematically cover all possible memory defect modes. The engine can generate and apply complex test patterns internally that are specifically designed to detect various defect types, ensuring complete defect coverage that external testing cannot achieve.
Solution Approach 2:
The BIST engine dynamically changes test parameters such as data patterns, address sequences, and timing characteristics to execute diverse test algorithms. This parameter variation enables the detection of different defect types by adapting the test approach to target specific failure modes.
Data Source
AI summary
A programmable Built In Self Test (BIST) system used to test embedded memories where the memories may be operating at a clock frequency higher than the operating frequency of the BIST. A plurality of BIST memory ports are used to generate multiple memory test instructions in parallel, and the parallel instructions are then merged to generate a single memory test instruction stream at a speed that is a multiple of the BIST operating frequency.