Multi-Port Host Memory Buffers for Low-Latency FTL Access
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Solution Overview
Problem
Multi-port memory systems in automotive applications face inefficiencies and potential bottlenecks due to the complex management of Flash Translation Layers (FTLs) across multiple hosts, leading to increased latency, resource consumption, and the risk of errors and system failures, particularly in critical systems like IVI and ADAS.
Innovation Solution
A memory controller negotiates separate and exclusive Host Memory Buffers (HMBs) for each host system, allowing independent memory operations, reducing access times, and improving efficiency by utilizing storage allocated by multiple hosts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single shared memory buffer is used across multiple host systems, then device complexity is reduced, but access latency increases and system efficiency deteriorates due to contention and bottlenecks
Solution Approach 1:
The patent divides the shared memory buffer resource into separate dedicated buffers for each host system. Each host system receives its own HMB (Host Memory Buffer) portion, eliminating contention and allowing parallel independent access. This segmentation resolves the contradiction by sacrificing some management complexity (now need to track multiple buffers) to dramatically reduce access latency and improve throughput.
2Productivity
If separate Host Memory Buffers are negotiated for each host system, then memory access efficiency improves and latency reduces, but device complexity and negotiation overhead increase
Solution Approach 1:
The patent performs buffer allocation and negotiation during the initialization phase, before actual memory operations begin. The controller pre-negotiates and assigns dedicated HMB portions to each host system, storing this mapping information for future use. This preliminary action eliminates the need for complex runtime negotiation, reducing operational complexity while maintaining high productivity during actual memory operations.
3Quantity of substance
If multiple host systems share the same memory buffer, then resource utilization appears high, but error risk and system failure probability increase due to interference and conflicts
Solution Approach 1:
By segmenting the shared buffer into isolated dedicated portions for each host system, the patent eliminates interference and conflicts that arise from simultaneous access. Each host operates independently in its assigned HMB space, preventing error propagation and system failures while still utilizing the physical memory resources of the storage device. This segmentation maintains effective resource utilization while dramatically improving reliability.
Data Source
AI summary
The disclosure configures a multi-port memory sub-system controller to store data in one or more host memory buffers. The disclosure associates, with a first port of a memory sub-system, a first host memory buffer (HMB) of a first temporary storage device that has been allocated to the memory sub-system by a first host system of a plurality of host systems and associates, with a second port of the memory sub-system, a second HMB of a second temporary storage device that has been allocated to the memory sub-system by a second host system of the plurality of host systems. The disclosure performs one or more memory operations on user data using the first HMB and the second HMB and a set of memory components.