Multi-port Memory Write Margin Enhancement
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Solution Overview
Problem
Conventional semiconductor memory bit cells face reliability issues with writing data at lower voltages due to reduced write margins, and the need for multiple supply voltages complicates integration and power management.
Innovation Solution
A multiple-port memory design that utilizes dual write ports and a low voltage mode to enhance write margins by doubling the writing strength through parallel conductance of pass transistors, allowing reliable data writing at voltages as low as less than one volt.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If write voltage is reduced to scale down memory circuit voltages, then power consumption is reduced, but write reliability deteriorates due to reduced write margins
Solution Approach 1:
The patent combines multiple write ports (first write port and second write port) to simultaneously write data to the same memory location. This merging of write paths increases the effective write strength and write margin, enabling reliable writing at reduced supply voltages where a single write port would be insufficient.
2Reliability
If multiple supply voltages are used to improve write margin, then write reliability is improved, but device complexity increases due to additional voltage regulators and power rails
Solution Approach 1:
The patent makes existing write ports serve multiple functions: they can operate independently for normal write operations, or be combined to work together for enhanced write margin operations. This multi-functionality eliminates the need for separate high-voltage write circuits or additional voltage regulators, reducing device complexity while maintaining improved write reliability.
3Reliability
If multiple write ports are used to increase write strength, then write margin is improved, but device complexity increases due to additional write ports
Solution Approach 1:
The patent implements multi-functionality by enabling existing write ports to serve dual purposes: individual operation for standard writes and combined operation for enhanced-margin writes. This approach achieves improved write margin without adding dedicated additional write port infrastructure, thereby limiting the increase in device complexity.
Data Source
AI summary
A multi-port memory is operated according to a method. Data is written, in a first mode, to a storage node of a memory cell from a first port through a first conductance. The first mode is characterized by a power supply voltage being applied at a power node at a first level. Data is written, in a second mode, to the storage node of the memory cell simultaneously from the first port through the first conductance and a second port through a second conductance. The second mode is characterized by the power supply voltage being applied at the power node at a second level different from the first level.