Multi-port MRAM Cell with Resistive Switching for Concurrent Access

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing complexity and size of multi-port RAM devices due to additional ports lead to increased power consumption and heat generation, which is disadvantageous in portable electronic devices.

Innovation Solution

A multi-port magnetoresistive random access memory (MRAM) device with a resistive memory cell and multiple ports, enabling concurrent access and operations without the need for additional circuitry, thus reducing size and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple ports are added to RAM cells to enable concurrent access, then memory access speed and productivity are improved, but device size and complexity increase

Engineering Contradiction:
Improvememory access speedVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces the conventional SRAM cell structure with a resistive memory element that uses electrical resistance changes instead of mechanical or complex transistor-based switching mechanisms. This substitution enables multi-port access capability while significantly reducing the number of transistors and circuitry required, thus lowering device complexity while maintaining improved access speed.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent utilizes changes in electrical resistance parameter of the memory element to represent and store data states. By controlling the resistance state through voltage or current pulses applied through different ports, the system achieves multi-port concurrent access without requiring additional complex routing or switching circuitry, thereby improving productivity without proportionally increasing device complexity.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If multiple ports are added to RAM cells to enable concurrent access, then memory access speed is improved, but power consumption increases

Engineering Contradiction:
Improvememory access speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The resistive memory element replaces traditional SRAM transistor-based systems, reducing the number of active components that consume power. The memory element's resistance-state changes can be induced with lower power requirements compared to charging/discharging capacitor networks in SRAM, thus achieving fast access speeds with reduced power consumption.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The resistive memory element inherently maintains its state through its resistance configuration without requiring continuous power supply or complex retention circuitry. The resistance state naturally persists, eliminating the need for continuous power consumption to maintain data, while still allowing fast read/write operations through the multiple ports when power is applied.

Inventive Principle:
Principle #25Self-service

3Productivity

If multiple ports are added to RAM cells to enable concurrent access, then memory access speed is improved, but heat generation increases

Engineering Contradiction:
Improvememory access speedVSAvoidheat generation
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The substitution of SRAM transistor switching with resistive state changes in the memory element reduces the energy dissipation mechanisms that generate heat. Resistive switching involves smaller current pulses and fewer parasitic effects compared to transistor switching, resulting in reduced heat generation while maintaining the speed benefits of multi-port access.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

By utilizing resistance state changes as the fundamental operating mechanism, the system achieves fast access speeds with lower energy dissipation. The resistance transitions can be induced with controlled current pulses that generate minimal heat compared to the voltage switching and capacitor charging/discharging processes in conventional multi-port SRAM cells.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The MRAM device provides a smaller, more efficient multi-port cell that supports instant-on architecture, allowing for immediate access to state information without loading, reducing start-up time and power usage.

Implementation Method 1

a resistive memory element... At least one of the plurality of memory cells includes a resistive memory element

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Implementation Method 2

multi-port magnetoresistive random access memory (MRAM) device

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentUS9135974B2Multi-port non-volatile memory that includes a resistive memory element
Publication Date: 2015.09.15 QUALCOMM INC
  • US9135974B2 patent drawing
  • US9135974B2 patent drawing
  • US9135974B2 patent drawing

AI summary

A particular method of accessing a multi-port non-volatile memory device includes executing a first memory operation with respect to a first memory cell while executing a second memory operation with respect to a second memory cell. The first memory operation is via a first port and the second memory operation is via a second port. The first memory cell includes a first non-volatile memory that includes a first resistive memory structure. The second memory cell includes a second non-volatile memory that includes a second resistive memory structure. The first memory cell and the second memory cell are each accessible via the first port and the second port.