Multi-Processor Boot Memory Sharing

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Solution Overview

Problem

Conventional multi-processor systems in mobile devices face challenges with high manufacturing costs and physical size due to the use of NOR flash memory for boot codes, which are expensive and bulky, while ROM or EPROM-based systems limit functionality.

Innovation Solution

A multi-processor system design where multiple processors share access to a single boot memory, specifically utilizing NAND flash memory to store boot codes, allowing for efficient initialization of IP blocks and reducing device size and manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If NOR flash memory is used to store boot codes in each processor, then boot code can be easily modified and refreshed, but manufacturing cost and physical size increase

Engineering Contradiction:

Improveboot code modifiabilityVSAvoiddevice physical size

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the boot memory resources of multiple processors into a single shared boot memory. Instead of each processor having its own NOR flash memory, all processors share one common boot memory through a bus interface, reducing the total number of memory components and their associated physical space.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The shared boot memory serves multiple functions: it stores boot codes for multiple different processors, acts as a common initialization resource for the entire system, and provides a universal storage location that any processor can access during system initialization.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If NOR flash memory is used to store boot codes, then boot code can be easily modified and refreshed, but manufacturing cost increases

Engineering Contradiction:

Improveboot code modifiabilityVSAvoidmanufacturing cost

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The system copies boot codes from the shared boot memory to individual processors as needed during initialization. Rather than each processor having its own permanent boot memory, the boot codes are copied on-demand, reducing hardware requirements while maintaining the ability to execute initialization routines.

Inventive Principle:

Principle #26Copying

3Area of stationary object

If ROM or EPROM is used to store boot codes, then manufacturing cost and device size are reduced, but boot code cannot be easily modified or refreshed

Engineering Contradiction:

Improvedevice physical sizeVSAvoidboot code modifiability

Core Design Contradiction:

Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent introduces a bus interface as an intermediary between the shared boot memory and multiple processors. This intermediary manages access to the boot memory, allowing processors to retrieve boot codes while maintaining a compact system architecture. The bus interface enables flexible access patterns without requiring dedicated memory for each processor.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Productivity

If each processor has its own boot memory, then initialization can proceed independently, but device complexity and manufacturing cost increase

Engineering Contradiction:

Improveinitialization speedVSAvoidsystem structure

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS8650388B2Multi-processor systems and booting methods thereof

Publication Date: 2014.02.11 SAMSUNG ELECTRONICS CO LTD

AI summary

Multi-processor systems and methods thereof are provided. In an example, the multi-processor system may include a boot memory including a plurality of boot codes, each of the plurality of boot codes configured to facilitate an initialization process at one of a plurality of intellectual property (IP) blocks, each of the plurality of IP blocks having shared access to the boot memory. In another example, the multi-processor system may receive, from a first processor, a request to provide one of a plurality of boot codes from a boot memory, the received request sent in response to a system initializing signal, may read the requested boot code from the boot memory and may transfer, from a second processor, the read boot code to the first processor.